EPF10K10LC84-4 Datasheet, PDF (88/128 Pages) Altera Corporation – Embedded Programmable Logic Device Family

FLEX 10K Embedded Programmable Logic Device Family Data Sheet
Table 69. EPF10K100 Device External Timing Parameters Note (1)
Symbol
t_DRR
t_INSU (2), (3), (4)
t_OUTCO (3), (4)
t_INH (3)
t_INSU (2), (3), (5)
t_OUTCO (3), (5)
-3DX Speed Grade
Min
Max
19.1
7.8
2.0
11.1
0.0
6.2
2.0
6.7
-3 Speed Grade
Min
Max
19.1
7.8
2.0
11.1
0.0
–
–
-4 Speed Grade
Unit
Min
Max
24.2
ns
8.5
ns
2.0
14.3
ns
0.0
ns
–
ns
–
ns
Table 70. EPF10K100 Device External Bidirectional Timing Parameters Note (1)
Symbol
-3DX Speed Grade
-3 Speed Grade
-4 Speed Grade
Min
Max
Min
Max
Min
t_INSUBIDIR (4)
t_INHBIDIR (4)
t_OUTCOBIDIR (4)
t_XZBIDIR (4)
t_ZXBIDIR (4)
t_INSUBIDIR (5)
t_INHBIDIR (5)
t_OUTCOBIDIR (5)
t_XZBIDIR (5)
t_ZXBIDIR (5)
8.1
0.0
2.0
11.1
15.3
15.3
9.1
0.0
2.0
7.2
14.3
14.3
8.1
10.4
0.0
0.0
2.0
11.1
2.0
15.3
15.3
–
–
–
–
–
–
–
–
–
Notes to tables:
(1) All timing parameters are described in Tables 32 through 38 in this data sheet.
(2) Using an LE to register the signal may provide a lower setup time.
(3) This parameter is specified by characterization.
(4) This parameter is measured without the use of the ClockLock or ClockBoost circuits.
(5) This parameter is measured with the use of the ClockLock or ClockBoost circuits.
Max
14.3
18.4
18.4
–
–
–
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
88
Altera Corporation