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EP3C80F780C8N Datasheet, PDF (21/34 Pages) Altera Corporation – This chapter describes the electric characteristics, switching characteristics, and I/O timing for Cyclone® III devices. A glossary is also included for your reference. | |||
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Chapter 1: Cyclone III Device Datasheet
Switching Characteristics
1â21
Table 1â29. Cyclone III Devices True LVDS Transmitter Timing Specifications (1)
Symbol
Modes
C6
Min Max
C7, I7
Min Max
C8, A7
Min Max
Ã10
5
420
5
370
5
320
Ã8
5
420
5
370
5
320
fHSCLK (input
Ã7
clock frequency)
Ã4
5
420
5
370
5
320
5
420
5
370
5
320
Ã2
5
420
5
370
5
320
Ã1
5
420
5 402.5 5 402.5
Ã10
100 840 100 740 100 640
Ã8
80 840 80 740 80 640
HSIODR
Ã7
70 840 70 740 70 640
Ã4
40 840 40 740 40 640
Ã2
20 840 20 740 20 640
Ã1
10 420 10 402.5 10 402.5
tDUTY
TCCS
â
45
55
45
55
45
55
â
â 200 â 200 â 200
Output jitter
(peak to peak)
â
â 500 â 500 â 550
tLOCK (2)
â
â
1
â
1
â
1
Notes to Table 1â29:
(1) True LVDS transmitter is only supported at the output pin of Row I/O (Banks 1, 2, 5, and 6).
(2) tLOCK is the time required for the PLL to lock from the end of device configuration.
Unit
MHz
MHz
MHz
MHz
MHz
MHz
Mbps
Mbps
Mbps
Mbps
Mbps
Mbps
%
ps
ps
ms
Table 1â30. Cyclone III Devices Emulated LVDS Transmitter Timing Specifications (1) (Part 1 of 2)
Symbol
fHSCLK (input
clock frequency)
HSIODR
tDUTY
TCCS
Modes
Ã10
Ã8
Ã7
Ã4
Ã2
Ã1
Ã10
Ã8
Ã7
Ã4
Ã2
Ã1
â
â
C6
Min Max
5
320
5
320
5
320
5
320
5
320
5 402.5
100 640
80 640
70 640
40 640
20 640
10 402.5
45
55
â 200
C7, I7
Min Max
5
320
5
320
5
320
5
320
5
320
5 402.5
100 640
80 640
70 640
40 640
20 640
10 402.5
45
55
â 200
C8, A7
Min Max
5
275
5
275
5
275
5
275
5
275
5 402.5
100 550
80 550
70 550
40 550
20 550
10 402.5
45
55
â 200
Unit
MHz
MHz
MHz
MHz
MHz
MHz
Mbps
Mbps
Mbps
Mbps
Mbps
Mbps
%
ps
July 2012 Altera Corporation
Cyclone III Device Handbook
Volume 2
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