EP1M120 Datasheet, PDF (20/86 Pages) Altera Corporation – Programmable Logic Device Family

Mercury Programmable Logic Device Family Data Sheet
Figure 8. Normal-Mode LE Note (1)
data1
data2
data3
Carry-In from
Previous LE (2)
data4
4-Input
LUT
Combinatorial
Output
Registered
PRN/ALDn
D
Q
Output
ENA
CLRN
LAB-Wide Clock Enable (3)
Notes to Figure 8:
(1) LEs in normal mode support register packing.
(2) When using the carry-in in normal mode, the packed register feature is unavailable.
(3) There are two LAB-wide clock enables per LAB in addition to LE-specific clock enables.
LE-Out
LE-Out
LE-Out
Arithmetic Mode
The arithmetic mode is ideal for implementing adders, accumulators, and
comparators. A LE in arithmetic mode contains four 2-input LUTs. The
first two 2-input LUTs compute two summations based on a possible
carry of 1 or 0; the other two LUTs generate carry outputs for the two
possible chains of the carry-select look-ahead (CSLA) circuitry. As shown
in Figure 9, the LAB carry-in signal selects the appropriate carry-in chain
(either carry-in0 or carry-in1). The logic level of the chain selected
in turn selects which parallel sum is generated as a combinatorial or
registered output. For example, when implementing an adder, this output
is the signal comprised of the sum data1 + data2 + carry, where carry is
0 or 1. The other two LUTs use the data1 and data2 signals to generate
two possible carry-out signals—one for a carry of 1 and the other for a
carry of 0. The carry-in0 signal acts as the carry select for the
carry-out0 output; carry-in1 acts as the carry select for the
carry-out1 output. LEs in arithmetic mode can drive out registered and
unregistered versions of the LUT output. Figure 9 shows a Mercury LE in
arithmetic mode.
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Altera Corporation