EN6310QI Datasheet, PDF (20/23 Pages) Altera Corporation – Integrated Inductor

minimized, even under the capacitors.
Recommendation 2: The system ground
plane should be the first layer immediately
below the surface layer. This ground plane
should be continuous and un-interrupted below
the converter and the input/output capacitors.
Please see the Gerber files on EN6310QI’s
product page at www.altera.com/enpirion.
Recommendation 3: The large thermal pad
underneath the component must be connected
to the system ground plane through as many
vias as possible.
The drill diameter of the vias should be
0.33mm, and the vias must have at least 1 oz.
copper plating on the inside wall, making the
finished hole size around 0.20-0.26mm. Do not
use thermal reliefs or spokes to connect the
vias to the ground plane. This connection
provides the path for heat dissipation from the
converter. See Figure 8.
Recommendation 4: Multiple small vias (the
same size as the thermal vias discussed in
recommendation 3 should be used to connect
ground terminal of the input capacitor and
output capacitors to the system ground plane.
It is preferred to put these vias under the
capacitors along the edge of the GND copper
closest to the +V copper. Please see Figure 8.
These vias connect the input/output filter
capacitors to the GND plane, and help reduce
parasitic inductances in the input and output
current loops. If the vias cannot be placed
EN6310QI
under C_IN and C_OUT, then put them just outside
the capacitors along the GND slit separating
the two components. Do not use thermal reliefs
or spokes to connect these vias to the ground
plane.
Recommendation 5: AVIN is the power supply
for the internal small-signal control circuits. It
should be connected to the input voltage at a
quiet point. A good location is to place the
AVIN connection on the source side of the
input capacitor, away from the PVIN pins.
Recommendation 6: The layer 1 metal under
the device must not be more than shown in
Figure 8. See the section regarding exposed
metal on bottom of package. As with any
switch-mode DC/DC converter, try not to run
sensitive signal or control lines underneath the
converter package on other layers.
Recommendation 7: The V_OUT sense point
should be just after the last output filter
capacitor. Keep the sense trace as short as
possible in order to avoid noise coupling into
the control loop.
Recommendation 8: Keep R_A, C_A, and R_B
close to the VFB pin (see Figures 6 and 7).
The VFB pin is a high-impedance, sensitive
node. Keep the trace to this pin as short as
possible. Whenever possible, connect R_B
directly to the AGND pin instead of going
through the GND plane.
09644
June 22, 2016
www.altera.com/enpirion, Page 20
Rev E