EN6310QI Datasheet, PDF (1/23 Pages) Altera Corporation – Integrated Inductor

Enpirion^® Power Datasheet
EN6310QI 1A PowerSoC
Voltage Mode Synchronous
PWM Buck with Integrated Inductor
Description
The EN6310QI is a member of Altera Enpirion’s high
efficiency EN6300 family of PowerSoCs. It can
support up to 1A of continuous output current and has
an input voltage range of 2.7V to 5.5V.
The EN6310QI employs Altera Enpirion’s EDMOS
MOSFET technology for monolithic integration and
very low switching loss. The device switches at
2.2MHz in fixed PWM operation to eliminate the low
frequency noise that is created by pulse frequency
modulation operating modes. The MOSFET ratios are
optimized to offer high conversion efficiency for lower
VOUT settings.
Output voltage settings are programmable via a
simple resistor divider circuit. Output voltage can be
programmed from as low as 0.6V to 3.3V. The
device has a programmable soft-start ramp rate to
accommodate sequencing and to prevent un-wanted
current inrush at start up. A Power OK (POK) flag is
provided to indicate a fault condition.
The Altera Enpirion power solution significantly helps
in system design and productivity by offering greatly
simplified board design, layout and manufacturing
requirements. In addition, a reduction in the number
of vendors required for the complete power solution
helps to enable an overall system cost savings.
All Enpirion products are RoHS compliant and lead-
free manufacturing environment compatible.
Features
• Integrated inductor, MOSFET and Controller
• Small 4mm x 5mm x 1.85mm QFN
• High Efficiency up to 96%
• Solution Footprint Less than 65mm²
• 1A Continuous Output Current
• VIN Range of 2.7V to 5.5V
• VOUT Range from 0.6V to 3.3V
• Programmable Soft Start and Power OK Flag
• Fast Transient Response and Recovery Time
• Low Noise and Low Output Ripple; 4mV Typical
• 2.2MHz Switching Frequency
• Under Voltage Lock-out (UVLO), Short Circuit, Over
Current and Thermal Protection
Applications
• Altera FPGAs (MAX, ARRIA, CYCLONE, STRATIX)
• Low Power FPGA Applications
• All SERDES and IO Supplies Requiring Low Noise
• Applications Requiring High Efficiency
• Enterprise Grade Solid State Drive (SSD)
• Noise Sensitive Wireless and RF Applications
V_IN
CIN2
4.7µF
RAVIN
CIN1 _20Ω
100pF
ON
OFF
CAVIN
0.47µF
CSS
10nF
PVIN
VOUT
EN6310QI
ENABLE
AVIN
VFB
SS
PGND
AGND
PGND
V_OUT
COUT
RA
47µF
CA
0805
RCA
RB
Figure 1. Simplified Applications Circuit
Efficiency vs. Output Current
100
95
90
85
80
75
70
VOUT = 2.5V
CONDITIONS
65
VOUT = 1.0V
V_IN = 3.3V
60
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
OUTPUT CURRENT (A)
Figure 2. Highest Efficiency in Smallest Solution Size
09644
June 22, 2016
www.altera.com/enpirion
Rev E