EP3C5E144I7 Datasheet, PDF (19/34 Pages) Altera Corporation – Cyclone III Device Datasheet

Chapter 1: Cyclone III Device Datasheet
Switching Characteristics
1–19
Table 1–27. Cyclone III Devices Emulated RSDS_E_1R Transmitter Timing Specifications ⁽¹⁾ (Part 2 of 2)
Symbol
Modes
C6
C7, I7
Min Typ Max Min Typ Max
×10
100 — 170 100 — 170
×8
Device
×7
operation in
Mbps
×4
×2
80
— 170 80 — 170
70
— 170 70 — 170
40
— 170 40 — 170
20
— 170 20 — 170
×1
10
— 170 10 — 170
t_DUTY
TCCS
—
45
—
55
45 —
55
—
—
— 200 — — 200
Output jitter
(peak to
—
peak)
—
— 500 — — 500
20 – 80%,
t_RISE
C_LOAD = 5 pF
— 500 —
— 500 —
t_FALL
t_LOCK ⁽²⁾
20 – 80%,
C_LOAD = 5 pF
—
— 500 —
—
—
1
— 500 —
——
1
Notes to Table 1–27:
(1) Emulated RSDS_E_1R transmitter is supported at the output pin of all I/O banks.
(2) t_LOCK is the time required for the PLL to lock from the end of device configuration.
C8, A7
Min Typ Max
100 — 170
80 — 170
70 — 170
40 — 170
20 — 170
10 — 170
45 — 55
— — 200
— — 550
— 500 —
— 500 —
—— 1
Unit
Mbps
Mbps
Mbps
Mbps
Mbps
Mbps
%
ps
ps
ps
ps
ms
Table 1–28. Cyclone III Devices Mini-LVDS Transmitter Timing Specifications ^{(1), (2)} (Part 1 of 2)
Symbol
f_HSCLK (input
clock
frequency)
Device
operation in
Mbps
t_DUTY
TCCS
Modes
×10
×8
×7
×4
×2
×1
×10
×8
×7
×4
×2
×1
—
—
C6
C7, I7
C8, A7
Min Typ Max Min Typ Max Min Typ Max
5
— 200 5
— 155.5 5
— 155.5
5
— 200 5
— 155.5 5
— 155.5
5
— 200 5
— 155.5 5
— 155.5
5
— 200 5
— 155.5 5
— 155.5
5
— 200 5
— 155.5 5
— 155.5
5
— 400 5
— 311
5
— 311
100 — 400 100 — 311 100 — 311
80
— 400 80 — 311 80
— 311
70
— 400 70 — 311 70
— 311
40
— 400 40 — 311 40
— 311
20
— 400 20 — 311 20
— 311
10
— 400 10 — 311 10
— 311
45
— 55
45 — 55
45
—
55
—
— 200 — — 200 —
— 200
Unit
MHz
MHz
MHz
MHz
MHz
MHz
Mbps
Mbps
Mbps
Mbps
Mbps
Mbps
%
ps
July 2012 Altera Corporation
Cyclone III Device Handbook
Volume 2