EP5358XUI Datasheet, PDF (11/16 Pages) Altera Corporation – 600mA PowerSoC Synchronous Buck Regulator with Integrated Inductor

Application Information
V_IN
4.7µF
PVIN
AVIN
ENABLE
VOUT
VSENSE
VS0
VS1
VS2
PGND AGND
V_OUT
10µF
Figure 6: Application Circuit, EP5358HUI,.
V_IN
4.7µF
PVIN
VOUT
AVIN
VSENSE
ENABLE
VFB
VS0
VS1
VS2
PGND AGND
V_OUT
10µF
Figure 7: Application Circuit, EP5358LUI, showing
the V_FB function.
Output Voltage Programming
The EP5358xUI utilizes a 3-pin VID to program
the output voltage value. The VID is available
in two sets of output VID programming ranges.
The VID pins should be connected either to
AVIN or to AGND to avoid noise coupling into
the device.
The “Low” range is optimized for low voltage
applications. It comes with preset VID settings
ranging from 0.80V and 1.5V. This VID set
also has an external divider option.
To specify this VID range, order part number
EP5358LUI.
The “High” VID set provides output voltage
settings ranging from 1.8V to 3.3V. This
version does not have an external divider
option. To specify this VID range, order part
number EP5358HUI.
Internally, the output of the VID multiplexer
sets the value for the voltage reference DAC,
EP5358LUI/EP5358HUI
which in turn is connected to the non-inverting
input of the error amplifier. This allows the use
of a single feedback divider with constant loop
gain and optimum compensation, independent
of the output voltage selected.
NOTE: The VID pins must not be left floating.
EP5358L Low VID Range Programming
The EP5358LUI is designed to provide a high
degree of flexibility in powering applications
that require low V_OUT settings and dynamic
voltage scaling (DVS). The device employs a
3-pin VID architecture that allows the user to
choose one of seven (7) preset output voltage
settings, or the user can select an external
voltage divider option. The VID pin settings
can be changed on the fly to implement glitch-
free voltage scaling.
Table 1: EP5358LUI VID Voltage Select Settings
VS2
VS1
VS0
VOUT
0
0
0
1.50
0
0
1
1.45
0
1
0
1.20
0
1
1
1.15
1
0
0
1.10
1
0
1
1.05
1
1
0
0.8
1
1
1
EXT
Table 1 shows the VS2-VS0 pin logic states for
the EP5358LUI and the associated output
voltage levels. A logic “1” indicates a
connection to AVIN or to a “high” logic voltage
level. A logic “0” indicates a connection to
AGND or to a “low” logic voltage level. These
pins can be either hardwired to AVIN or AGND
or alternatively can be driven by standard logic
levels. Logic levels are defined in the electrical
characteristics table. Any level between the
logic high and logic low is indeterminate.
EP5358LUI External Voltage Divider
The external divider option is chosen by
connecting VID pins VS2-VS0 to V_IN or a logic
“1” or “high”. The EP5358LUI uses a separate
feedback pin, V_FB, when using the external
divider. V_SENSE must be connected to V_OUT as
indicated in figure 8.
www.altera.com/enpirion Page 11
03541
October 11, 2013
Rev F