EP1K30TC144-2N Datasheet, PDF (1/182 Pages) Altera Corporation – Package Information Datasheet for Mature Altera Devices

Package Information Datasheet for
Mature Altera Devices
DS-PKG-16.8
This datasheet provides package and thermal resistance information for mature
Altera^® devices. Package information includes the ordering code reference, package
acronym, leadframe material, lead finish (plating), JEDEC outline reference, lead
coplanarity, weight, moisture sensitivity level, and other special information. The
thermal resistance information includes device pin count, package name, and
resistance values.
This datasheet includes the following sections:
■ “Device and Package Cross Reference” on page 1
■ “Thermal Resistance” on page 23
■ “Package Outlines” on page 44
f For more package and thermal resistance information about Altera devices that are
not listed in this datasheet, refer to the Package and Thermal Resistance page of the
Altera website.
f For information about trays, tubes, and dry packs, refer to AN 71: Guidelines for
Handling J-Lead, QFP, and BGA Devices.
f RoHS-compliant devices are compatible with leaded-reflow temperatures. For more
information, refer to Altera’s RoHS-Compliant Devices literature page.
Device and Package Cross Reference
Table 2 through Table 22 lists the device, package type, and number of pins for each
Altera device listed in this datasheet. Altera devices listed in this datasheet are
available in the following packages:
■ Ball-Grid Array (BGA)
■ Ceramic Pin-Grid Array (PGA)
■ FineLine BGA (FBGA)
■ Hybrid FineLine BGA (HBGA)
■ Plastic Dual In-Line Package (PDIP)
■ Plastic Enhanced Quad Flat Pack (EQFP)
■ Plastic J-Lead Chip Carrier (PLCC)
■ Plastic Quad Flat Pack (PQFP)
■ Power Quad Flat Pack (RQFP)
■ Thin Quad Flat Pack (TQFP)
■ Ultra FineLine BGA (UBGA)
© December 2011 Altera Corporation
Package Information Datasheet for Mature Altera Devices