5AGXFB7K4F40I3N Datasheet, PDF (1/39 Pages) Altera Corporation – Key Advantages of Arria V Devices

2013.12.26
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Arria V Device Overview
The Arria^® V device family consists of the most comprehensive offerings of mid-range FPGAs ranging from
the lowest power for 6 gigabits per second (Gbps) and 10 Gbps applications, to the highest mid-range FPGA
bandwidth 12.5 Gbps transceivers.
The Arria V devices are ideal for power-sensitive wireless infrastructure equipment, 20G/40G bridging,
switching, and packet processing applications, high-definition video processing and image manipulation,
and intensive digital signal processing (DSP) applications.
Related Information
Arria V Device Handbook: Known Issues
Lists the planned updates to the Arria V Device Handbook chapters.
Key Advantages of Arria V Devices
Table 1: Key Advantages of the Arria V Device Family
Advantage
Supporting Feature
Lowest static power in its class
• Built on TSMC's 28 nm process technology and includes an
abundance of hard intellectual property (IP) blocks
• Power-optimized MultiTrack routing and core architecture
• Up to 50% lower power consumption than the previous
generation device
• Lowest power transceivers of any midrange family
Improved logic integration and
differentiation capabilities
• 8-input adaptive logic module (ALM)
• Up to 38.38 megabits (Mb) of embedded memory
• Variable-precision digital signal processing (DSP) blocks
Increased bandwidth capacity
• Serial data rates up to 12.5 Gbps
• Hard memory controllers
Hard processor system (HPS) with •
integrated ARM^® Cortex^™-A9 MPCore
processor
•
Tight integration of a dual-core ARM Cortex-A9 MPCore
processor, hard IP, and an FPGA in a single Arria V system-on-
a-chip (SoC)
Supports over 128 Gbps peak bandwidth with integrated data
coherency between the processor and the FPGA fabric
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