2GB-DDR2-AS4C256M8D2 Datasheet, PDF (51/70 Pages) Alliance Semiconductor Corporation – Weak Strength Data-Output Driver Option

2Gb DDR2 - AS4C256M8D2
Measurement Definition for VM: Measure voltage (VM) at test pin (midpoint) with no load.
Input DC logic level
VM =
2 x Vm
- 1 x 100%
VDDQ
Symbol
V_IH(dc)
V_IL(dc)
Parameter
dc input logic HIGH
dc input logic LOW
Min.
VREF + 0.125
- 0.3
Max.
VDDQ + 0.3
VREF - 0.125
Units
V
V
Input AC logic level
DDR2-800
Unit
Symbol
Parameter
Min
Max
VIH(ac)
ac input logic HIGH
VREF+0.200 VDDQ+Vpeak
V
VIL(ac)
ac input logic LOW
VSSQ-Vpeak VREF-0.200
V
Notes
AC input test conditions
Symbol
V_REF
V_SWING(MAX)
SLEW
Condition
Input reference voltage
Input signal maximum peak to peak swing
Input signal minimum slew rate
Value
0.5 x V_DDQ
1.0
1.0
Units
V
V
V/ns
Notes
1
1
2, 3
NOTE 1 Input waveform timing is referenced to the input signal crossing through the V_IH/IL(AC) level
applied to the device under test.
NOTE 2 The input signal minimum slew rate is to be maintained over the range from V_REF to V_IH(ac) min
for rising edges and the range from V_REF to V_IL(ac) max for falling edges as shown in the below figure.
NOTE 3 AC timings are referenced with input waveforms switching from VIL(ac) to VIH(ac) on the pos-
itive transitions and VIH(ac) to VIL(ac) on the negative transitions.
V_SWING(MAX)
Falling Slew =
TF
TR
V_REF - V_IL(ac) max
TF
Rising Slew =
AC input test signal waveform
V_DDQ
V_IH(ac) min
V_IH(dc) min
V_REF
V_IL(dc) max
V_IL(ac) max
V_SS
V_IH(ac) min - V_REF
TR
Confidential
-51/70-
Rev.1.0 Sep. 2015