16MX16-DDR1-AS4C16M16D1A Datasheet, PDF (4/64 Pages) Alliance Semiconductor Corporation – Auto Refresh and Self Refresh

 
F  igure 2. Block Diagram
CK
CK
CKE
DLL
CLOCK
BUFFER
CS
RAS
CAS
WE
COMMAND
DECODER
16Mx16 DDR1-AS4C16M16D1A
CONTROL
SIGNAL
GENERATOR
4M x 16
CELL ARRAY
(BANK #0)
Column Decoder
A10/AP
COLUMN
COUNTER
A0
A9
A11
A12
BA0
BA1
ADDRESS
BUFFER
REFRESH
COUNTER
LDQS
UDQS
DQ0
DQ15
DATA
STROBE
BUFFER
MODE
REGISTER
DQ
Buffer
LDM
UDM
4M x 16
CELL ARRAY
(BANK #1)
Column Decoder
4M x 16
CELL ARRAY
(BANK #2)
Column Decoder
4M x 16
CELL ARRAY
(BANK #3)
Column Decoder
Confidential
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Rev.1.1 July 2015