AS4C16M16MD1 Datasheet, PDF (36/55 Pages) Alliance Semiconductor Corporation – Programmable output buffer driver strength

AS4C16M16MD1
256Mb MOBILE DDR SDRAM
CK
CK
Command
Address
DQS
DQ
WRITE
NOP
BA,Col b
tDQSSmax
DI b
NOP
BA,Col n
NOP
t_WR
*2
PRE
BA a(or
all)
NOP
DM
*1
*1
*1
*1
1) Dl b = Data in to column b.
2) An interrupted burst of 4, 8 or 16 is shown, 2 data elements are written.
3) tWR is referenced from the positive clock edge after the last desired Data In pair.
4) A10 is LOW with the WRITE command (Auto Precharge is disabled)
5) *1=can be Don't Care for programmed burst length of 4
6) *2=for programmed burst length of 4, DQS becomes Don't Care at this point
= Don't Care
Figure 31 — Interrupting Write to Precharge
7.7 Precharge
The PRECHARGE command (see Figure 32) is used to deactivate the open row in a particular bank or the open row in all banks.
The bank(s) will be available for a subsequent row access a specified time (tRP) after the PRECHARGE command is issued.
CK
CK
CKE
CS
(High)
RAS
CAS
WE
Address
A10
BA0,BA1
All Banks
One Bank
BA
= Don't Care
BA=BANK Address
(if A10 = L,otherwise Don't Care)
Figure 32 — Precharge command
Input A10 determines whether one or all banks are to be precharged. In case where only one bank is to be precharged, inputs
BA0, BA1 select the bank. Otherwise BA0, BA1 are treated as “Don’t Care”.
Once a bank has been precharged, it is in the idle state and must be activated prior to any READ or WRITE command being
issued. A PRECHARGE command will be treated as a NOP if there is no open row in that bank, or if the previously open row is
already in the process of precharging.
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Mar, 28, 2013