AS4C4M16SA Datasheet, PDF (34/54 Pages) Alliance Semiconductor Corporation – Synchronous DRAM

AS4C4M16SA - Automotive
Figure 29.2. Random Row Read (Interleaving Banks)
(Burst Length=8, CAS# Latency=3)
CLK
T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 T10 T11 T12 T13 T14 T15 T16 T17 T18 T19 T20 T21 T22
CKE ^High
CS#
RAS#
CAS#
WE#
BA0,1
A10
RBx
A0-A9,
A11
DQM
RBx
tRCD
DQ
Hi-Z
Activate
Command
Bank B
CBx
tAC
RAx
RAx
CAx
RBy
RBy
tRP
CBy
Read
Command
Bank B
Bx0 Bx1 Bx2 Bx3 Bx4 Bx5 Bx6 Bx7 Ax0 Ax1 Ax2 Ax3 Ax4 Ax5 Ax6 Ax7 By0
Activate
Command
Bank A
Read
Command
Bank A
Precharge
Command
Bank B
Activate
Command
Bank B
Read
Command
Bank B
Precharge
Command
Bank A
Don’t Care
Confidential
34
Rev. 1.0-63nm Mar. /2014