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| AS7C33256PFD32A Datasheet, PDF (16/20 Pages) Alliance Semiconductor Corporation – 3.3V 256K x 32/36 pipelined burst synchronous SRAM | |||
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Timing waveform of power down cycle
CLK
tADSPS
ADSP
tADSPS
AS7C33256PFD32A
AS7C33256PFD36A
®
tCYC
tCH
tCL
ADSC
ADDRESS
A1
GWE
tCSS
CE0,CE2
tCSH
CE1
ADV
OE
Din
Dout
ZZ
Isupply
tOE
tLZOE
Q(A1)
tPDS
tHZC
tPUS
ZZ Recovery Cycle
ZZ Setup Cycle
tZZI
tRZZI
ISB2
READ SUSPEND
Q(A1) READ
Q(A1)
Sleep
State
12/1/04, v.1.2
Alliance Semiconductor
A2
tWS
tWH
tHZOE
D(A2)
D(A2(Ã01))
Normal Operation Mode
READ SUSPEND CON-
Q(A2) WRITE TINUE
D(A2) WRITE
D(A2 Ã01)
P. 16 of 20
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