AS4LC8M8S0 Datasheet, PDF (13/24 Pages) Alliance Semiconductor Corporation – 3.3V 4Mx16 and 8Mx8 CMOS synchronous DRAM

AS4LC8M8S0
AS4LC4M16S0
®
Concurrent Auto-P Waveforms
According to Intel™’s specification, auto-p burst interruption is allowed by another burst provided that the interrupting burst
is in a different bank than the ongoing burst.
(A) RD-P interrupted by RD in another bank (CL = 3, BL = 4)
CLK
CMD
RD-P
(A)
RD
(B)
DQ
A₀
A₁
B₀
B₁
B₂
B₃
Bank A Precharge Starts *
(B) RD-P interrupted by WR in another bank (CL = 2, BL = 8)
CLK
CMD
RD-P
(A)
WR
(B)
DQM
DQ
Q_A0
Q_A1
D_N(B0) D_(B1)
D_(B2)
D_(B7)
Bank A Precharge Starts *
(C) WR-P interrupted by RD in another bank (CL = 2, BL = 4)
CLK
WRP
CMD
(A)
RD
(B)
DQ
D_(A0)
D_(A1)
Q_B0
Q_B1
Q_B2
Q_B3
Bank A Precharge Starts *
* The row active command of the precharge bank can be issued after t _RP from this point.
7/5/00
ALLIANCE SEMICONDUCTOR
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