AS7C331MNTF18A Datasheet, PDF (12/18 Pages) Alliance Semiconductor Corporation – 3.3V 1M x 18 Flowthrough Synchronous SRAM with NTD

AS7C331MNTF18A
®
Timing waveform of read/write cycle
CLK
t_CH t_CL
t_CYC
t_CENS
CEN
t_CENH
CE1
CE0, CE2
t_CSS
t_CSH
t_ADVS
ADV/LD
t_WS
R/W
t_WS
BWn
t_ADVH
t_WH
t_WH
ADDRESS
t_AS
t_AH
A1
A2
D/Q
t_DS t_DH
D(A1)
OE
A3
D(A2)
A4
t_CD
t_LZC
D(A2Ý01)
A5
A6
t_OH
t_OE t_HZC
Q(A3)
Q(A4)
t_HZOE
Q(A4Ý01)
t_LZOE
A7
D(A5)
Q(A6)
Command
Write
D(A1)
Write
D(A2)
Burst
Write
D(A2Ý01)
Read
Q(A3)
Read
Q(A4)
Burst
Read
Q(A4Ý01)
Write
D(A5)
Read
Q(A6)
Write
D(A7)
DSEL
Note: Ý = XOR when LBO = high/no connect. Ý = ADD when LBO = low. BW[a:d] is don’t care.
12/23/04, v 1.2
Alliance Semiconductor
P. 12 of 18