5829 Datasheet, PDF (8/12 Pages) Allegro MicroSystems – 9-BIT SERIAL-INPUT, LATCHED SINK DRIVER

5829
9-BIT SERIAL-INPUT,
LATCHED SINK DRIVER
HIGH-SIDE DRIVER
To reduce the current decay time at the end of a print enable
cycle, an external high-side driver can be used and controlled by the
HIGH-SIDE DRIVER (HSD) output. The HSD is designed to drive an
external N-channel MOSFET (with accompanying charge pump
circuitry). During the print enable time (t_EN), the internal high-side
driver is OFF, allowing the external high-side driver to be ON. If the
external high-side driver is a P-channel device (eliminating the need
for charge-pump circuitry), the HSD signal must be inverted for correct
operation.
If an external high-side driver is used, an external ground clamp
diode is also required.
OUTPUT CURRENT CONTROL
Each of the nine channels consists of a power Darlington sink
driver, internal low-value current-sensing resistor, comparator, and an
R/S flip-flop. The output current is sensed and controlled indepen-
dently in each channel by means of a fixed-frequency chopper which
sets the flip-flop and allows the output to turn ON. As the current
increases in the load it is sensed by the internal sense resistor until the
sense voltage equals the trip voltage of the comparator. At this time,
the flip-flop is reset and the output is turned OFF. Over the range of
V_REF = 1.0 V to 3.2 V, the output current trip point is a linear function
of the reference voltage:
I_TRIP = V_REF/2
To ensure an accurate chop current level, an external 5 kΩ
resistor (R_CV) is used. The actual load current peak will be slightly
higher than the trip point (especially for low-inductance loads) because
of the internal logic and switching delays (typically 300 ns). After turn-
off, the load current decays, circulating through the load and an
external clamp diode. The output driver will stay OFF until the next
chop pulse sets the flip-flop, turning ON the output, and allowing load
current to rise again. The cycle repeats, maintaining the average
printhead current at the desired level.
The chop pulse frequency is determined by an external resistor
and capacitor at RC_C:
f_ch
=
1
2 R_C C_C
To reduce the power supply and ground noise developed when
operating nine channels synchronously, the outputs are split into two
groups (OUTPUTS 2, 4, 6, 8 and OUTPUTS 1, 3, 5, 7, 9) for chopping
pulses.
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