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A8650 Datasheet, PDF (5/31 Pages) Allegro MicroSystems – Low Input Voltage, Adjustable Frequency 2 A Synchronous Buck Regulator with EN/SYNC and Power OK
A8650
Low Input Voltage, Adjustable Frequency
2 A Synchronous Buck Regulator with EN/SYNC and Power OK
Pin-out Diagrams and Terminal List Table
SW 1
PGND 2
EN/SYNC 3
POK 4
FSET 5
PAD
10 VIN
9 GND
8 SS
7 FB
6 COMP
Package LY, 10-Pin MSOP Pin-out Diagram
SW 1
PGND 2
EN/SYNC 3
POK 4
FSET 5
PAD
10 VIN
9 GND
8 SS
7 FB
6 COMP
Package EJ, 10-Pin DFN Pin-out Diagram
Terminal List Table
Number Name
Function
1
SW
The drain of both the internal high- and low-side MOSFETs. The output inductor (LO) should be connected to this pin. LO
should be placed as close as possible to this pin and connected with relatively wide traces.
2
PGND Power ground connection.
Enable and synchronization input. This pin is a logic input that turns the regulator on or off: set this pin to logic high to turn the
3
EN/SYNC regulator on or set this pin to logic low to turn the regulator off. This pin also functions as a synchronization input to allow the
PWM frequency to be set by an external clock.
4
POK
Power OK output signal. This pin is an open drain output that transitions from low impedance to high impedance when the
output is within the final regulation voltage.
5
FSET
Frequency setting pin. A resistor, RFSET , from this pin to GND sets the PWM switching frequency. See figure 10 and/or
equation 2 to determine the value of RFSET .
6
COMP
Output of the error amplifier and compensation node for the current mode control loop. Connect a series RC network from this
pin to GND for loop compensation. See the Design and Component Selection sections of this datasheet for further details.
7
FB
Feedback (negative) input to the error amplifier. Connect a resistor divider from the regulator output node, VOUT, to this pin to
program the output voltage.
8
SS
Soft start pin. Connect a capacitor, CSS , from this pin to GND to set the soft start time. This capacitor also determines the
hiccup period during overcurrent.
9
GND Ground connection.
10
VIN
Power input for the control circuits and the source of the internal high-side P-channel MOSFET. Connect this pin to a power
supply of 2.5 to 5.5 V. A high quality ceramic capacitor should be placed very close to this pin.
0
PAD
Exposed pad of the package providing enhanced thermal dissipation. This pad must be connected to the ground plane(s) of
the PCB with at least 6 vias, directly in the pad.
Allegro MicroSystems, LLC
5
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com