A3944 Datasheet, PDF (24/31 Pages) Allegro MicroSystems – Automotive, Low-Side FET Pre-Driver

A3944
Automotive, Low Side FET Pre-Driver
Minimum guaranteed open load resistance
The minimum value of R_L that will always be detected as an open
is given by the maximum value of R_L that could be detected as a
load, R_Lmax. This is defined by:
R_Lmax =
V_Lmax – V_OLmax
I_DPDmin
– R_Dmin
(8)
For an 18 V supply this gives a minimum guaranteed open load
resistance value of 79 kΩ. This means that under all conditions,
with a load voltage of up to 18 V, a load resistance greater than
79 kΩ will always be detected as an open load. For a 36 V supply
the minimum guaranteed open load resistance value increases to
379 kΩ.
Maximum load resistance
The maximum value of R_L that will always be detected as a load
is given by the minimum value of R_L that could be detected as a
open, R_Lmin. This is defined by:
R_Lmax =
V_Lmax – V_OLmax
I_DPDmin
– R_Dmin
(9)
For a 6 V supply this gives a maximum value of 19 kΩ for the
sum of the open load resistance and the DRNx current limit resis-
tor. This means, for example, that under all conditions, with a
DRNx current limit resistor of up to 7 kΩ, a load resistance less
than 12 kΩ will never cause an open load detection.
The two limiting values are shown in figure 14 for load volt-
ages from 6 to 36 V. Note that the load resistance value includes
the DRNx current limit resistor. In this figure, a load resistance
greater than the upper line is guaranteed to be detected as an open
load and a load resistance less than the lower line is guaranteed
not to be detected as an open load.
Practical Short to Ground Limits
A short to ground is detected, when the external FET is off, if
the voltage at the DRNx terminal is less than the short to ground
threshold, V_STG . Under ideal conditions a short circuit would be
zero resistance and the short would be to ground at zero volts.
However in practical systems the short will have a finite resis-
tance and the power ground voltage may be higher than the refer-
ence ground of the detection circuit. The equivalent circuit during
a short to ground is shown in figure 15.
V_L
V_OCL
I_DPU
+
- _VSTG
DRNx
R_Dx
R_L
R_SG
V_G
Figure 14. Open load detection limits
Figure 15. Short to ground detection condition
Allegro MicroSystems, Inc.
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