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A1365 Datasheet, PDF (22/32 Pages) Allegro MicroSystems – Low-Noise, High-Precision, Programmable Linear Hall-Effect Sensor IC
A1365
Low-Noise, High-Precision, Programmable Linear Hall-Effect Sensor IC
With High-Bandwidth (120 kHz) Analog Output and Integrated Fault Comparator
Over Magnetic Field Fault
During normal operation, the ¯F¯A¯¯U¯¯L¯¯T¯ pin is in a high-impedance
state. The combination of an internal pull-up resistance with an
internal current source enables the ¯F¯A¯¯U¯¯L¯¯T¯ pin to be pulled high.
After the ¯F¯A¯¯U¯¯L¯¯T¯ pin reaches VSAT(HIGH) , the current source is
shut down.
The user could install an external pull-up resistor on the ¯F¯A¯¯U¯¯L¯¯T¯
pin to reduce the amount of time required by the ¯F¯A¯¯U¯¯L¯¯T¯ pin to
reach VSAT(HIGH) after a fault event passes. An external pull-up
resistor can be connected to a voltage (VF(PULLUP)) different
from VCC as long as it remains within the VF(PULLUP) limits. If
VF(PULLUP) is less than VCC, the current provided by the internal
current source, IIF(PULLUP), will flow through the external pull-up
resistance causing a small voltage drop.
Fault
Switchpoint (V)
Max Specified
Switchpoint
Mid Range
Specified Fault
Switchpoint Range
The A1365 offers a 6-bit programmable Ratiometric Fault as well
as a 2-bit programmable Ratiometric Fault Hysteresis.
Figure 17 illustrates the impact of programming 60 mV of Fault
Hysteresis on the Fault Switchpoint:
• FAULT_THRESH = 0, setting Positive and Negative Field
Fault Switchpoint (VFPSP, VFNSP) to the middle of their
programmable range.
• FAULT_HYST = 2, setting Fault Hysteresis Level to 60 mV.
The Fault Switchpoint is not affected by the selected Fault
Hysteresis Level.
The speed and accuracy with which a fault is triggered are
characterized by the Transient Fault Response Time (tTFR), the
DC Fault Switchpoint Error ( errDFS), and the Fault Delay Due to
Load Capacitance (tFDC).
VFAULT (V)
5.0
0.1
VFHYST
VFPSP
Min Specified
Switchpoint
0
31 32
63
FLT_THRESH
Figure 16: Fault Switchpoint Programming Profile
3940 4000
VOUT (mV)
Figure 17: Fault Hysteresis Behavior at FAULT_
THRESH = 0, FAULT_HYST = 2
A1365
VCC
IIF(PULLUP)
RIF(PULLUP)
VF(PULLUP)
VCC VOUT GND
FAULT
V+
RF(PULLUP)
CL
CF
(Optional)
CBYPASS
Figure 18: Fault Functional Circuit
Allegro MicroSystems, LLC
22
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com