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A1356 Datasheet, PDF (14/20 Pages) Allegro MicroSystems – High Precision Linear Hall-Effect Sensor
A1356
High Precision Linear Hall-Effect Sensor
With an Open Drain Pulse Width Modulated Output
and blown. An appropriate sequence for blowing code 5 is shown
in figure 7. The order of blowing bits, however, is not important.
Blowing bit 0 first, and then bit 2 is acceptable.
Note: After blowing, the programming is not reversible, even
after cycling the supply power. Although a register bit field fuse
cannot be reset after it is blown, additional bits within the same
register can be blown at any time until the device is locked. For
example, if bit 1 (binary 10) has been blown, it is still possible to
blow bit 0. The end result would be binary 11 (decimal code 3).
Locking the Device
After the desired code for each parameter is programmed, the
device can be locked to prevent further programming of any
parameters.
Additional Guidelines
The additional guidelines in this section should be followed to
ensure the proper behavior of these devices:
Bit Field Selection
Address Code Format
Code in Binary
Fuse Blowing
Target Bits
(Decimal Equivalent)
Code 5
(Binary)
101
Bit 2
Bit 0
Fuse Blowing
Address Code Format
Code 4
Code 1
(Decimal Equivalents)
Figure 6. Example of code 5 broken into its binary components, which are
code 4 and code 1.
• A 0.1 μF blowing capacitor, CBLOW , must be mounted between
the supply pin and the GND pin during programming, to ensure
enough current is available to blow fuses.
• The application capacitance, CL, should be used when measur-
ing the output duty cycle during programming.
• The power supply used for programming must be capable of
delivering at least 26 V and 300 mA.
• Be careful to observe the tLOW delay time before powering
down the device after blowing each bit.
• The following programming order is recommended:
1. fPWM
2. Sens
3. D(Q)
4. Lock the device (only after all other parameters have been
programmed and validated, because this prevents any further
programming of the device)
Programming Modes
Try Mode Try mode allows multiple programmable parameters
to be tested simultaneously without permanently setting any
values. In this mode, each VP(HIGH) pulse will indefinitely loop
the programming logic through the mode, register, and bit field
selection states.
After powering the VCC supply, select mode key 2, the desired
parameter register, and address its bit field. When addressing the
bit field, each VP(MID) pulse increments the value of the param-
eter register up to the maximum possible code (see Programming
Logic section). The addressed parameter value is stored in the
device even after the programming drive voltage is removed from
V+
VP(HIGH)
VP(MID)
VP(LOW)
0
Cycle VCC
supply
1
Mode
Selection
(Key 1)
12
Parameter
Selection
(Key 2)
1 23
Addressing
Bitfield 2
(Code 4)
4
Blow
Code 4
tBLOW
Cycle VCC
supply
tLow
Figure 7. Example of Blow Mode programming pulses applied to the VCC pin. In this example, DC(Q)
(Parameter Key 2) is addressed to code 4 (i.e bit 2) and its value is permanently blown.
Allegro MicroSystems, Inc.
14
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com