A4490 Datasheet, PDF (13/16 Pages) Allegro MicroSystems – Triple Output Step-Down Switching Regulator

A4490
Triple Output Step-Down Switching Regulator
Switch Dynamic Losses The following can be used to deter-
mine switch dynamic losses:
Both turn on and turn off losses can be estimated:
P_DYN = V_BB (min)
I_LOAD
2
30 10^–9 f_SW
,
(12)
where f_SW is the switching frequency.
Control Losses The following steps can be used to determine
control losses:
(a) Switch static losses
V_REG1 duty cycle, D₁ =
5+0.4
6+0.4
= 0.84
V_REG2 duty cycle, D₂
=
3.3+0.4
6+0.4
= 0.58
V_REG3 duty cycle, D₃
=
1.8+0.4
6+0.4
= 0.34
The R_DS(on) of each switch can be found:
R_DS(on)TJ =
450×10^–3
⎛
⎜⎜
⎝
1+
115 – 25
200
⎞
⎟⎟
⎠
=
0.653 Ω
P_VBB = I_BBON × V_BB ,
(13)
where I_BBON is the quiescent current assuming all three regulators
are on.
P_VDD = I_VDD × V_DD ,
(14)
where I_VDD and is the quiescent current on VDD.
Total Losses The total losses can now be estimated:
P_TOTAL = P_STAT1 + P_STAT2 + P_STAT2
+P_DYN1 +P_DYN2 + P_DYN3
+P_VBB + P_VDD .
(15)
Thermal Impedance The thermal impedance required for the
solution can now be determined:
R_QJA =
T_J – T_A
P_TOTAL
.
(16)
Example
Selected parameters:
V_BB(min) = 6 V
V_REG1 = 5 V at 1 A
V_REG2 = 3.3 V at 1 A
V_REG3 = 1.8 V at 800 mA
T_A= 70°C
T_J = 115°C
V_f = 0.4 V
The static loss of each switch can be found:
P_STAT1 = 1² × 0.84 × 0.653 = 0.55 W
P_STAT2 = 1² × 0.58 × 0.653 = 0.379 W
P_STAT3 = 0.8² × 0.34 × 0.653 = 0.14 W
(b) Switch dynamic losses
P_DYN1 = 6
1
2
30 10^–9
P_DYN2 = 6
1
2
30 10^–9
P_DYN3 = 6
0.8
2
30 10^–9
500 10³ = 0.045 W
500 10³ = 0.045 W
500 10³ = 0.036 W
(c) Control losses
P_VBB = 0.005 × 6 = 0.03 W
P_VDD = 0.001 × 3.3 = 0.003 W
(d) The total power dissipation can now be found:
P_TOTAL = 0.55 + 0.379 + 0.14 + 0.045
+ 0.045 + 0.036 + 0.03 + 0.003 = 1.228 W
(e) The thermal impedance required for the solution can be
found:
R_QJA
=
115 – 70
1.228
=
36.6 °C/W
For this particular solution a high thermal efficiency board is
required to ensure the junction temperature is kept below 115°C.
For maximum effectiveness, the PCB pad area underneath the
thermal pad of the A4490 should be exposed copper. Several
thermal vias (say between 4 and 8) should be used to connect
the thermal pad to the internal ground plane. If possible, an
additional thermal copper plane should be applied to the bottom
side of the PCB and connected to the thermal pad of the A4490
through the vias.
Allegro MicroSystems, Inc.
13
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com