A4956 Datasheet, PDF (10/11 Pages) Allegro MicroSystems – Full-Bridge PWM Gate Driver

A4956
Full-Bridge PWM Gate Driver
For Reference Only – Not for Tooling Use
(Reference MO-153 ACT)
NOT TO SCALE
Dimensions in millimeters
Exact case and lead configuration at supplier discretion within limits shown
6.50 ±0.10
4.20
20
8º
0º
0.20
0.09
C
A
12
20X
0.10 C
0.30
0.19
20
1.70
0.65 BSC
0.45
3.00 4.40 ±0.10 6.40 ±0.20
0.60 ±0.15 ^{1.00 REF}
1.20 MAX
C
SEATING
PLANE
0.25 BSC
SEATING PLANE
GAUGE PLANE
0.15
0.00
0.65
NNNNNNN
YYWW
LLLLLLL
3.00 6.10
1
D Standard Branding Reference View
N = Device part number
= Supplier emblem
Y = Last two digits of year of manufacture
W = Week of manufacture
L = Lot number
12
4.20
B PCB Layout Reference View
A Terminal #1 mark area
B Reference land pattern layout (reference IPC7351 SOP65P640X110-21M);
all pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary
to meet application process requirements and PCB layout tolerances; when
mounting on a multilayer PCB, thermal vias at the exposed thermal pad land
can improve thermal dissipation (reference EIA/JEDEC Standard JESD51-5)
C Exposed thermal pad (bottom surface)
D Branding scale and appearance at supplier discretion
LP Package, 20-Pin eTSSOP with Exposed Thermal Pad
Allegro MicroSystems, LLC
10
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com