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3968 Datasheet, PDF (1/12 Pages) Allegro MicroSystems – DUAL FULL-BRIDGE PWM MOTOR DRIVER WITH BRAKE
3968
ADVANCE INFORMATION
(subject to change without notice)
September 3, 1999
A3968SLB
OUT1A 1
INPUT1A 2
INPUT1B 3
GROUND 4
VBB
LOGIC LOGIC
16 OUT2A
15 INPUT2A
14 INPUT2B
13 GROUND
SENSE 1 5
OUT1B 6
LOAD
VBB
SUPPLY 7
REFERENCE 8 VREF
12 SENSE 2
11 OUT 2B
V CC
10
LOGIC
SUPPLY
RC 9 RC
Dwg. PP-066
ABSOLUTE MAXIMUM RATINGS
Load Supply Voltage, VBB ................... 30 V
Output Current, IOUT (peak) .......... ±750 mA
(continuous) .............................. ±650 mA
Logic Supply Voltage, VCC ................. 7.0 V
Input Voltage, Vin ..... -0.3 V to VCC + 0.3 V
Sense Voltage, VS ................................ 1.0 V
Package Power Dissipation (TA = 25°C), PD
A3968SA ................................... 2.08 W*
A3968SLB ................................. 1.87 W*
Operating Temperature Range,
TA ................................... -20°C to +85°C
Junction Temperature,
TJ ................................................. +150°C
Storage Temperature Range,
TS ................................. -55°C to +150°C
Output current rating may be limited by duty
cycle, ambient temperature, and heat sinking.
Under any set of conditions, do not exceed the
specified current rating or a junction temperature
of 150°C.
* Per SEMI G42-88 Specification, Thermal Test
Board Standardization for Measuring Junction-
to-Ambient Thermal Resistance of Semiconductor
Packages.
DUAL FULL-BRIDGE PWM
MOTOR DRIVER WITH BRAKE
The A3968SA and A3968SLB are designed to bidirectionally control two
dc motors. Each device includes two H-bridges capable of continuous output
currents of ±650 mA and operating voltages to 30 V. Motor winding current
can be controlled by the internal fixed-frequency, pulse-width modulated
(PWM), current-control circuitry. The peak load current limit is set by the
user’s selection of a reference voltage and current-sensing resistors. Except
for package style and pinout, the two devices are identical.
The fixed-frequency pulse duration is set by a user-selected external
RC timing network. The capacitor in the RC timing network also determines
a user-selectable blanking window that prevents false triggering of the PWM
current-control circuitry during switching transitions.
To reduce on-chip power dissipation, the H-bridge power outputs have
been optimized for low saturation voltages. The sink drivers feature Allegro’s
patented Satlington™ output structure. The Satlington outputs combine the
low voltage drop of a saturated transistor and the high peak current capability
of a Darlington.
For each bridge, the INPUTA and INPUTB terminals determine the load
current polarity by enabling the appropriate source and sink driver pair.
When a logic low is applied to both INPUTs of a bridge, the braking function
is enabled. In brake mode, both source drivers are turned OFF and both sink
drivers are turned ON, thereby dynamically braking the motor. When a logic
high is applied to both INPUTs of a bridge, all output drivers are disabled.
Special power-up sequencing is not required. Internal circuit protection
includes thermal shutdown with hysteresis, ground-clamp and flyback diodes,
and crossover-current protection.
The A3968SA is supplied in a 16-pin dual in-line plastic package. The
A3968SLB is supplied in a 16-lead plastic SOIC with copper heat sink tabs.
The power tab is at ground potential and needs no electrical isolation.
FEATURES
s ±650 mA Continuous Output Current
s 30 V Output Voltage Rating
s Internal Fixed-Frequency PWM Current Control
s Satlington™ Sink Drivers
s Brake Mode
s User-Selectable Blanking Window
s Internal Ground-Clamp & Flyback Diodes
s Internal Thermal-Shutdown Circuitry
s Crossover-Current Protection and UVLO Protection
Always order by complete part number:
Part Number Package
A3968SA
16-pin DIP
A3968SLB
16-lead batwing SOIC
RθJA
60°C/W
67°C/W
RθJC
38°C/W
—
RθJT
—
6°C/W