AK93C45CL Datasheet, PDF (9/16 Pages) Asahi Kasei Microsystems – 1K/2K/4Kbit Serial CMOS EEPROM

ASAHI KASEI
[AK93C45C/55C/65C]
READ
The read instruction is the only instruction which outputs serial data on the DO pin.
Following the Start bit, first Op code and address are decoded, then the data from the selected
memory location is available at the DO pin. A dummy bit (logical "0") precedes the 16-bit data from
the selected memory location. The output data changes are synchronized with the rising edges of
the serial clock (SK).
The data in the next address can be read sequentially by continuing to provide clock. The address
automatically cycles to the next higher address after the 16bit data shifted out.
When the highest address is reached, the address counter rolls over to address 00h allowing the
read cycle to be continued indefinitely.
CS
SK
DI
DO
012345
8 9 10 11
25 26
40 41
0 1 1 0 A5 A4
A1 A0
Start bit
Op code
Hi-Z
AK93C45C output a logic "1" (Ready status),
if previous instruction is WRITE, PAGE WRITE,
WRAL.
0 D15 D14
D0
Dummy
Bit
address[A5–A0]
D15
D1 D0
address[A5–A0]+1
READ (AK93C45C)
CS
SK
DI
DO
012345
10 11 12 13
27 28
42 43
0 1 1 0 X A6
A1 A0
Start bit Op code
Hi-Z
AK93C55C output a logic "1" (Ready status),
if previous instruction is WRITE, PAGE WRITE,
WRAL.
0 D15 D14
D0
Dummy
Bit
address[A6–A0]
D15
D1 D0
address[A6–A0]+1
X: Don't care
READ (AK93C55C)
CS
SK
DI
DO
012345
10 11 12 13
27 28
42 43
0 1 1 0 A7 A6
A1 A0
Start bit Op code
Hi-Z
AK93C65C output a logic "1" (Ready status),
if previous instruction is WRITE, PAGE WRITE,
WRAL.
0 D15 D14
D0
Dummy
Bit
address[A7–A0]
D15
D1 D0
address[A7–A0]+1
READ (AK93C65C)
DAM06E-01
-9-
2005/10