AKD4551 Datasheet, PDF (7/17 Pages) Asahi Kasei Microsystems – EVALUATION BOARD REV.C FOR AK4551

ASAHI KASEI
[AKD4551]
n Other jumper pins set up
[JP1] (GND): Analog ground and digital ground
open: separated <default>
AGND and DGND are connected near to AK4551 on the board.
[JP2] (VP-VD): VP and VD
open: separated <default>
short: common (The connector “VP” can be open.)
[JP3, 4] (DEM0, DEM1): Set up the de-emphasis of AK4551
DEM1 (JP3) DEM0 (JP4) Mode
open
open
44.1kHz
open
short
OFF
short
open
48kHz
short
short
32kHz
Table 3. Set up the de-emphasis of AK4551
[JP5] (SCLK2): Phase of SCLK
THR: SCLK is coincides with AK4551. <default>
INV: SCLK is inverted.
[JP7] (SDTO): SDTO of AK4551
Always open. It is possible to short for evaluation mode 7.
[JP11] (SPEED): Select of MCLK
NORMAL: 256fs <default>
DOUBLE: 512fs
n The function of the toggle SW.
Upper-side is “ON” and lower-side is “OFF”.
[SW1] ( PWDA ):
[SW2] ( PWAD ):
[SW4] (DIT_RST):
Resets the D/A of AK4551. Keep “ON” during normal operation.
Resets the A/D of AK4551. Keep “ON” during normal operation.
Resets the CS8402. “OFF” resets the internal counter of CS8402, then Bi-phase signal is not
output. Keep “ON” during normal operation.
n Indication for LED
[LED1]: Indicate whether the input data of CS8412 is pre-emphasized or not.
[LED2] (VERF): Monitor VERF pin of the CS8412. LED turns on when some error has occurred to CS8412.
<KM062000>
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