AK9813B Datasheet, PDF (7/24 Pages) Asahi Kasei Microsystems – 12ch 8bit D/A Converter with EEPROM

ASAHI KASEI
[AK9813B]
Instruction Set
The AK9813B can be controlled for the following mode. The following mode is common to the
LD I/F and the CS IF. When LD I/F is selected, "A1" and "A0" are set by the external pins (EA0 pin
and EA1 pin).
①DAC mode (External DI pin -> D/A converter)
［X： Don't Care］
A1 A0 CL WR D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
Function
X X 0 0 D/A CHANNEL
Digital Data for D/A
D/A output
②CALL mode (Internal EEPROM -> D/A converter)
［X： Don't Care］
A1 A0 CL WR D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
ADDRESS 1 0
D/A CHANNEL
X X X X X X X X READ
・The output of D/A converter is set by the data in the internal EEPROM.
Function
③ALL CALL mode (Internal EEPROM -> D/A converter)
［X： Don't Care］
A1 A0 CL WR D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
Function
ADDRESS 1 0 0 0 0 0 X X X X X X X X ALL CHANNEL READ
・The outputs of all D/A converters are set by the data in the internal EEPROM.
...Internal ECL function
④WRITE ENABLE mode (Internal EEPROM WRITE ENABLE)
［X： Don't Care］
A1 A0 CL WR D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
Function
X X 1 1 0 0 0 0 X X X X X X X X WRITE ENABLE
・After WRITE ENABLE mode is executed, the programming to the internal EEPROM is enabled.
Upon power-up and after the execution of the ECL function, the AK9813B is in the programming
disable state.
⑤WRITE DISABLE mode (Internal EEPROM WRITE DISABLE)
［X： Don't Care］
A1 A0 CL WR D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
Function
X X 1 1 1 1 1 1 X X X X X X X X WRITE DISABLE
・After WRITE DISABLE mode is executed, the programming to the internal EEPROM is disabled.
⑥WRITE mode (External DI pin -> Internal EEPROM)
［X： Don't Care］
A1 A0 CL WR D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
Function
ADDRESS 0 1
D/A CHANNEL
Digital Data for D/A
WRITE
・The digital data for D/A (D0 to D7) is written into the specified address in the internal EEPROM.
The state of the internal EEPROM must be the programming enable state.
⑦READ mode (Internal EEPROM -> External DO pin)
［X： Don't Care］
A1 A0 CL WR D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
Function
ADDRESS 1 1
D/A CHANNEL
X X X X X X X X EEPROM DATA output
・The DO pin outputs the data in the internal EEPROM synchronously with the falling edge of the
input pulse of the CLK pin.
DAD04E-01
-7-
2002/11