AK93C45A Datasheet, PDF (7/14 Pages) Asahi Kasei Microsystems – 1K / 2K / 4K / 8KBIT SERIAL CMOS EEPROM

ASAHI KASEI
[AK93C45A/55A/65A/75A]
EWEN / EWDS
When VCC is applied to the part, the part automatically powers up in the ERASE/WRITE Disable
state. In the ERASE/WRITE disable state, execution of WRITE instruction is disable. Before
WRITE instruction is executed, EWEN instruction must be executed. The ERASE/WRITE enable
state continues until EWDS instruction is executed or VCC is removed from the part.
Execution of a read instruction is independent of both EWEN and EWDS instructions.
CS
SK
0
1
2
3
4
5
6
7
8
9
DI
DO
0
1
0
0
XXXX
Start bit
EW EN=11
EW DS=00
Hi-Z
AK93C45A output a logic "1" (Ready status),
if previous instruction is WRITE.
X: Don't care
EWEN / EWDS (AK93C45A)
CS
SK
0
1
2
3
4
5
6
7
8
9 10 11
DI
DO
0
1
0
0
XXXXXX
Start bit
EW EN=11
EW DS=00
Hi-Z
AK93C55A/65A output a logic "1" (Ready status),
if previous instruction is WRITE.
X: Don't care
EWEN / EWDS (AK93C55A/65A)
CS
SK
0
1
2
3
4
5
6
7
8
9 10 11 12 13
DI
DO
0
1
0
0
XXXXXXXX
Start bit
EW EN=11
EW DS=00
Hi-Z
AK93C75A output a logic "1" (Ready status),
if previous instruction is WRITE.
X: Don't care
EWEN / EWDS (AK93C75A)
DAM01E-02
-7-
2002/06