AK4634 Datasheet, PDF (66/77 Pages) Asahi Kasei Microsystems – 16-Bit Mono CODEC with ALC & MIC/SPK-AMP

[AK4634]
Addr
07H
Register Name
ALC Mode Control 1
R/W
Default
D7
LFST
R/W
0
D6
ALC2
R/W
0
D5
ALC1
R/W
0
D4
ZELMN
R/W
0
D3
LMAT1
R/W
0
D2
LMAT0
R/W
0
D1
RGAIN0
R/W
0
D0
LMTH0
R/W
1
LMTH1-0: ALC Limiter Detection Level / Recovery Waiting Counter Reset Level (Table 25)
LMTH1 bit is located at D6 bit of 0BH. Default: “01”
RGAIN1-0: ALC Recovery GAIN Step (Table 29)
RGAIN1 bit is located at D7 bit of 0BH. Default: “00”
LMAT1-0: ALC Limiter ATT Step (Table 26)
Default: “00”
ZELMN: Zero crossing detection enable at ALC Limiter operation
0: Enable (default)
1: Disable
ALC1: ALC of recoding path Enable
0: Disable (default)
1: Enable
ALC2: ALC2 of playback path Enable
0: Disable (default)
1: Enable
LFST: Limiter function of ALC when the output was bigger than Fs.
0: The volume value is changed at zero crossing or timeout. (default)
1: When output of ALC is bigger than FS, VOL value is changed instantly.
Addr
08H
Register Name
ALC Mode Control 2
R/W
Default
D7
IREF7
R/W
1
D6
IREF6
R/W
1
D5
IREF5
R/W
0
D4
IREF4
R/W
0
D3
IREF3
R/W
0
D2
IREF2
R/W
1
D1
IREF1
R/W
0
D0
IREF0
R/W
1
IREF7-0: Reference value at ALC Recovery operation for recoding. (0.375dB step, 242 Level) (Table 30)
Default: “C5H” (+19.5dB)
Rev. 0.5
- 66 -
2007/10