AK5558VN_16 Datasheet, PDF (64/70 Pages) Asahi Kasei Microsystems – 8-Channel Differential 32-bit ADC

[AK5558]
Addr Register Name
05H DSD
R/W
Default
D7
D6
D5
D4
D3
D2
D1
D0
0
0
DCKS
0
PMOD
DCKB
DSDSEL DSDSEL
1
0
R/W R/W R/W R/W R/W R/W R/W
R/W
0
0
0
0
0
0
0
0
DSDSEL1-0: Select the Frequency of DCLK
00: 64fs (default)
01: 128fs
10: 256fs
11: Reserved
DCKB: Polarity of DCLK
0: DSD data is output from DCLK Falling Edge (default)
1: DSD data is output from DCLK Rising Edge
PMOD: DSD Phase Modulation Mode
0: Not Phase Modulation Mode (default)
1: Phase Modulation Mode
DSD Output Phase Modulation Mode Enable
DCKS: Master Clock Frequency Select at DSD Mode (DSD Only)
0: 512fs (default)
1: 768fs
Addr
06H
Register Name
TEST1
R/W
Default
D7
TST7
RD
0
D6
TST6
RD
0
D5
TST5
RD
0
D4
TST4
RD
0
D3
TST3
RD
0
D2
TST2
RD
0
D1
TST1
RD
0
D0
TST0
RD
0
TST7-0: Test register.
This register must be used as the default setting. Normal operation is not guaranteed if all bits
are not “0”.
Addr
07H
Register Name
TEST2
R/W
Default
D7
D6
D5
D4
D3
D2
D1
D0
0
0
0
0
0
0
0
TRST
R/W R/W R/W R/W R/W R/W R/W
W
0
0
0
0
0
0
0
0
TRST: Test register. This register must be “0”.
This register must be “0”.
This register must be used as the default setting. Normal operation is not guaranteed if all bits
are not “0”.
015099850-E-00
- 64 -
2016/03