AKD4686-B Datasheet, PDF (6/55 Pages) Asahi Kasei Microsystems – AK4686 Evaluation Board Rev.0

[AKD4686-B]
„ Register control
AKD4686-B can be controlled via the printer port (parallel port) of IBM-AT compatible PC. Connect PORT3
(uP-I/F) to PC by 10-line flat cable packed with this. Take care of the direction of connector.
PORT3
10 UP-I/F 9
PC
RED
10-wire flat cable
Connect
SCL
SDA
SDA (ACK)
10-pin connector
2
1
10-pin header
AKD46 86-B
„ Set-up DIP switch (SW3, 4)
Figure 2. PORT1 pin layout
No.
SW3-1
SW3-2
SW3-3
SW3-4
SW3-6
SW3-7
SW3-8
SW4-1
SW4-2
SW4-3
SW4-4
SW4-6
SW4-7
Name
Content
Default
DIF0
Setting of AK4118 Audio Interface Format
ON
DIF1
(Refer Table 16.)
OFF
DIF2
ON
CM0
Selection of AK4118 Clock Mode (Clock Source)
(Refer Table 17.)
OFF
OCKS0 Selection of AK4118 Master Clock Output frequency OFF
OCKS1
(Refer Table 18.)
ON
MS1
PORT1 Master Mode/Slave Mode Switch
(Refer to the AK4686’s datasheet)
OFF
DIF0
Setting of AK4118 Audio Interface Format
ON
DIF1
(Refer Table 16.)
OFF
DIF2
ON
CM0
Selection of AK4118 Clock Mode (Clock Source)
(Refer Table 17.)
OFF
OCKS0 Selection of AK4118 Master Clock Output frequency OFF
OCKS1
(Refer Table 18.)
ON
Table 15. Set up modes of AK4118 (U4, U7) and AK4686 (U1)
Mode
0
1
2
3
4
5
6
7
DIF2
0
0
0
0
1
1
1
1
DIF1
0
0
1
1
0
0
1
1
DIF0
DAUX
SDTO
0 24bit, Left justified 16bit, Right justified
1 24bit, Left justified 18bit, Right justified
0 24bit, Left justified 20bit, Right justified
1 24bit, Left justified 24bit, Right justified
0 24bit, Left justified 24bit, Left justified
1 24bit, I²S
24bit, I²S
0 24bit, Left justified 24bit, Left justified
1 24bit, I²S
24bit, I²S
Table 16. AK4118 Audio Interface Format
LRCK
I/O
H/L O
H/L O
H/L O
H/L O
H/L O
L/H O
H/L I
L/H I
BICK
I/O
64fs O
64fs O
64fs O
64fs O
64fs O
64fs O
64-128fs I
64-128fs I
<Default>
Mode
0
1
CM0 PLL X'tal Clock source SDTO
0 ON
ON
PLL
RX
1 OFF ON
X'tal
DAUX
Table 17. AK4118 Clock Mode (Clock Source)
<Default>
< KM103800>
-6-
2010/08