AK2347B Datasheet, PDF (6/34 Pages) Asahi Kasei Microsystems – Two-way Radio Audio & Sub-Audio Processor

ASAHI KASEI
[AK2347B]
Pin
number
Pin name
11 SCLK
12 CSN
13 TEST
14 XIN
15 XOUT
16 VDD
17 TSAOUT
Pin
type
DI
DI
DO
DB
DI
PWR
AO
Power-
down
status
Function
Z Serial data clock input pin
Z
Serial data chip select input
This signal is active low.
Output pin for testing
L This pin is assigned to test pin for pre-delivery inspection in factory.
Do not connect anything in normal operation.
Pin for connecting a crystal oscillator
A reference clock used within this IC is generated by connecting a
*5)
3.6864MHz or 3.579545MHz oscillator between this pin and the
adjacent XOUT pin. For detailed information about the connection
method and the method for supplying an external clock, see
“Recommended External Application Circuits”.
*5) Pin for connecting a crystal oscillator
Positive power supply pin
−
Connect this pin to a power supply ranging from 2.7V to 3.3V with
less noise. Connect a bypass capacitor of 0.1μF or higher between
this pin and the VSS pin.
Z Transmit Sub-Audio signal output pin *2)
18 RSAOUT AO
19 DIN
AI
20 DINO
AO
Z Receive Sub-Audio signal output pin *2)
Data input pin
This pin is the inverting input pin of DTA1. This pin, with resistors
Z and capacitors externally connected, forms a amplifier.
An external signal such as a tone signal through CPU port can be
input.
Z Output pin of DTA1 *1)
21 RXOUT
AO
22 FILTERO AO
23 RXINO
AO
24 RXIN
AI
Z Receive audio signal output pin *2)
RXLPF or TX/RX_HPF block output pin
This pin can be used as a monitor pin for a signal such as a tone
Z signal. The output signal on this pin includes a 57.6kHz
sampling-clock component. So, perform waveform processing
externally as required. *2)
Z Output pin of RXA1 *1)
Demodulated receive signal input pin
Z Inverting input pin of RXA1. This pin, with resistors and capacitors
externally connected, forms a pre-filter.
Note) A: Analog, D: Digital, PWR: Power, I: Input, O: Output, B: Bi-directional, Z: High-Z, L: Low
*1) Output load requirement: [load impedance] > 30kΩ, [load capacitance] < 50pF
*2) Output load requirement: [load impedance] > 10kΩ, [load capacitance] < 50pF
*3) AGND (=1/2VDD) level
*4) AGND + 0.256(VDD-AGND) level
*5) When XOUT pin is set to low level, XIN pin goes to High-Z.
When XOUT pin is set to high level, XIN pin outputs low level.
MS1419-E-00
-6-
2012/05