AK2301A Datasheet, PDF (6/20 Pages) Asahi Kasei Microsystems – 3.3V Single channel PCM CODEC LSI

ASAHI KASEI
AK2301A
PCM INTERFACE (Lomg Frame, Short Frame)
All timing parameters of the output pins are measured at VOH = 0.8VDD and VOL = 0.4V. Input pins
are measured at VIH = 0.7VDD and VIL = 0.3VDD.
AC Characteristics
Parameter
Symbol Min Typ Max Unit Ref Fig
FS Frequency
BCLK Frequency
BCLK Pulse Width (High/Low) (BCLK=32×FS=256kHz)
BCLK Pulse Width (High/Low) (BCLK=64×FS=512kHz)
Rising/Falling Time: (BCLK,FS0,FS1,DX0,DX1,DR0,DR1)
Hold Time: BCLK Low to FS High
Setup Time: FS High to BCLK Low
Setup Time: DR to BCLK Low
Hold Time: BCLK Low to DR
Delay Time: BCLK High to DX valid
Note1）
Delay Time: BCLK High to DX High-Z
Note1）
Long Frame
Hold Time: 2^nd period of BCLK Low to FS Low
Delay Time: FS or BCLK High, whichever is later,to DX valid
注1）
FS Pulse Width Low
Short Frame
f_PF
f_PB
t_WBH
t_WBL
t_WBH
t_WBL
t_RB
t_FB
t_HBF
t_SFB
t_SDB
t_HBD
t_DBD
t_DZC
-1.0% 8 +1.0% kHz
-
32FS/
64FS
-
kHz
1.563 1.953 2.344 µs
0.781 0.977 1.172 µs
40 ns
60
ns ^{Fig1, 2}
60
ns
60
ns
60
ns
60 ns
60 ns
t_HBFL
60
t_DZFL
t_WFSL
1
ns
60 ns ^Fig1
BCLK
Hold Time: BCLK Low to FS Low
t_HBFS
60
Setup Time: FS Low to BCLK Low
t_SFBS
60
Note1) Measured with 50pF load capacitance and 0.2mA drive.
ns
Fig2
ns
<MS0300-E-00>
6
2004/3