AK2301A Datasheet, PDF (15/20 Pages) Asahi Kasei Microsystems – 3.3V Single channel PCM CODEC LSI

ASAHI KASEI
AK2301A
- Frame sync signal （FS）
8kHz reference signal. This signal indicated the timing and the frame position of 8kHz PCM interface.
All the internal clock of the LSI is generated based on this FS signal.
-Bit clock （BCLK）
BCLK defines the PCM data rate. BCLK rate is 256kHz or 512kHz. This clock must be synchronized
with FS.
Long Frame
FS
BCLK
DX
1 2 3 4 5 6 7 8 9 10 11 12 13 14 L L
DR
Don't
care
1
2
3
4
5
6
7
8
9 10 11 12 13 14
Don't care
Short Frame
FS
BCLK
DX
1 2 3 4 5 6 7 8 9 10 11 12 13 14 L L
DR ^{Don't care} 1 2 3 4 5 6 7 8 9 10 11 12 13 14
Don't care
Important notice!
Please don’t stop feeding FS and BCLK.
Both FS and BCLK is used as the internal reference clock. LSI does not work when the FS and BCLK are not
provided.
<MS0300-E-00>
15
2004/3