AK4490 Datasheet, PDF (54/68 Pages) Asahi Kasei Microsystems – Premium 32-Bit 2ch DAC

[AK4490]
■ Register Map
Addr Register Name
D7
D6
D5
D4
D3
D2
D1
D0
00H Control 1
ACKS
EXDF
ECS
0
DIF2
DIF1
DIF0
RSTN
01H Control 2
DZFE
DZFM
SD
DFS1
DFS0 DEM1 DEM0 SMUTE
02H Control 3
DP
0
DCKS DCKB MONO DZFB SELLR SLOW
03H Lch ATT
ATT7
ATT6 ATT5 ATT4 ATT3 ATT2 ATT1
ATT0
04H Rch ATT
ATT7
ATT6 ATT5 ATT4 ATT3 ATT2 ATT1
ATT0
05H Control4
INVL
INVR
0
0
0
0
DFS2 SSLOW
06H Control5
DDM
DML
DMR
DMC DMRE
0
DSDD DSDSEL0
07H Control6
0
0
0
0
0
0
0
SYNCE
08H Control7
0
0
0
0
0
0
SC1
SC0
09H Control8
0
0
0
0
0
0
DSDF DSDSEL1
Notes:
In 3-wire serial control mode, the AK4490 does not support read commands.
The AK4490 supports read command in I²C-bus control mode.
Data must not be written into addresses from 0AH to 1FH.
When the PDN pin goes to “L”, the registers are initialized to their default values.
When RSTN bit is set to “0”, only the internal timing is reset, and the registers are not initialized to their
default values.
When the state of the PSN pin is changed, the AK4490 should be reset by the PDN pin.
■ Register Definitions
Addr Register Name
00H Control 1
R(I2C)/W
Default
D7
D6
D5
D4
D3
D2
D1
D0
ACKS EXDF
ECS
0
DIF2
DIF1
DIF0 RSTN
R/W
R/W
R/W
R
R/W
R/W
R/W
R/W
0
0
0
0
0
1
0
0
RSTN: Internal Timing Reset
0: Reset. All registers are not initialized. (default)
1: Normal Operation
Writing “0” to this bit resets the internal timing circuit but register values are not initialized.
When the PSN pin = “H”, the AK4490 operates regardless of this register setting.
DIF2-0: Audio Data Interface Modes (Table 20)
Initial value is “010” (Mode 2: 24-bit MSB justified).
ECS: EX DF I/F mode clock setting (Table 21)
0: WCK=768kHz mode (default)
1: WCK=384kHz mode
EXDF: External Digital Filter I/F Mode (Serial mode only)
0: Disable: Internal Digital Filter mode (default)
1: Enable: External Digital Filter mode
ACKS: Master Clock Frequency Auto Setting Mode Enable (PCM only)
0: Disable: Manual Setting Mode (default)
1: Enable: Auto Setting Mode
When ACKS bit = “1”, MCLK frequency and the sampling frequency are detected automatically.
MS1648-E-03
- 54 -
2014/11