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AK4490 Datasheet, PDF (38/68 Pages) Asahi Kasei Microsystems – Premium 32-Bit 2ch DAC
[AK4490]
[3] External Digital Filter Mode (EX DF I/F Mode)
DW indicates the number of BCK in one WCK cycle. The audio data is input by MCLK, BCK and WCK from
the DINL and DINR pins. Three formats are available (Table 22) by DIF2-0 bits setting. The data is latched on
the rising edge of BCK. The BCK and MCLK clocks must be the same frequency and must not burst. BCK and
MCLK frequencies for each sampling speed are shown in Table 21.
Sampling
Speed[kHz]
44.1(30~48)
44.1(30~48)
96(54~96)
96(54~96)
192(108~192)
192(108~192)
128fs 192fs
MCLK&BCK [MHz]
256fs 384fs
512fs
768fs
WCK ECS
N/A N/A N/A
N/A N/A N/A
N/A
N/A
22.5792 33.8688 16fs
32
48
DW
0
N/A N/A 11.2896 16.9344
N/A N/A
32
48
N/A
33.8688 8fs
1
N/A
96
DW
N/A N/A 24.576
36.864
N/A
N/A
8fs
0
N/A N/A
32
48
N/A
N/A DW
12.288 18.432 N/A
36.864
N/A
N/A
4fs
1
32
48
N/A
96
N/A
N/A DW
24.576 36.864 N/A
N/A
32
48
N/A
N/A
N/A
N/A
4fs
0
N/A
N/A DW
N/A 36.864 N/A
N/A
N/A 96
N/A
N/A
N/A
N/A
2fs
1
N/A
N/A DW
Table 21. System Clock Example (EX DF I/F mode) (N/A: Not available)
(default)
Mode DIF2 DIF1 DIF0
Input Format
0
0
0
0 16-bit LSB justified
1
0
0
1
N/A
2
0
1
0
N/A
3
0
1
1
N/A
4
1
0
0 24-bit LSB justified
5
1
0
1 32-bit LSB justified (default)
6
1
1
0
N/A
7
1
1
1
N/A
Table 22. Audio Interface Format (EX DF I/F mode) (N/A: Not available)
MS1648-E-03
- 38 -
2014/11