AKD4645A-A Datasheet, PDF (5/53 Pages) Asahi Kasei Microsystems – Evaluation board Rev.1 for AK4645A

ASAHI KASEI
[AKD4645A-A]
(1-4) All interface signals including master clock are fed externally.
PORT3 (ROM) is used. Nothing should be connected to PORT1 (DIR), PORT2 (DIT), and J11 (EXT). The
jumper pins should be set to the following. Please set SW2=“L”
JP name
JP25(EXT)
JP26(4114_MCKI_IN)
JP27(4114BICK_SEL)
JP28(4114LRCK_SEL)
State
Short
Open
Open
Open
JP name
JP32(BICK_SEL)
JP33(LRCK_SEL)
JP35(LRCK_MODE)
JP36(BICK_MODE)
State
Short
Short
Open
Open
JP24
MCLK
DIR
EXT
JP21
BICK
JP29
LRCK
JP30
SDTI
JP19
PHASE
JP20
PHASE
DIR 4040 DIR 4040 DIR 4040 THR INV THR INV
When AK4114 is used, JP22 (MKFS) and JP23 (BCFS) are not used. Therefore, JP22 (MKFS) should be set to
“x1” and JP23 (BCFS) should be set to “64fs”.
JP20 (PHASE) is jumper which decides polarity of BICK, “THR” or “INV” should be selected according to the
audio interface format.
„ DIP Switch set up
[S1] : Mode Setting of AK4114 and AK4645A
ON is “H”, OFF is “L”.
No.
Name
1
DIF0
2
DIF1
3
DIF2
4
OCKS1
5
CAD0
6
I2C
ON (“H”)
OFF (“L”)
AK4114 Audio Format Setting
See Table 2
AK4114 Master Clock Setting
See Table 3
See Table 4
default
OFF
OFF
ON
OFF
OFF
OFF
Table 1. Mode Setting for AK4645A and AK4114
DIF2 DIF1 DIF0 AK4114DAUX
0
0
0 24bit, Left justified
0
0
1 24bit, Left justified
0
1
0 24bit, Left justified
0
1
1 24bit, Left justified
1
0
0 24bit, Left justified
1
0
1 24bit, I²S
1
1
0 24bit, Left justified
1
1
1 24bit, I²S
AK4114SDTO
16bit, Right justified
18bit, Right justified
20bit, Right justified
24bit, Right justified
24bit, Left justified
24bit, I²S
24bit, Left justified
24bit, I²S
LRCK
I/O
H/L O
H/L O
H/L O
H/L O
H/L O
L/H O
H/L I
L/H I
BICK
I/O
64fs
O
64fs
O
64fs
O
64fs
O
64fs
O
64fs
O
64-128fs I
64-128fs I
<default>
Table 2. Setting for AK4114 Audio Interface Format
< KM094901>
-5-
2009/10