AK8160BV2 Datasheet, PDF (5/16 Pages) Asahi Kasei Microsystems – Low Power & Low Jitter Clock Generator for PCI Express

[AK8160BV2]
11
PCIE1_OE
PCIE1p/n Output Control Pin
DI
This pin must be connected to “H” or “L”. (1).
PCIE1_OE = “L” : PCIE1p/n outputs “L”.
PCIE1_OE = “H” : PCIE1p/n outputs 100MHz.
12
PCIE0_OE
PCIE0p/n Output Control Pin
DI
This pin must be connected to “H” or “L”. (1)
PCIE0_OE = “L” : PCIE0p/n outputs “L”.
PCIE0_OE = “H” : PCIE0p/n outputs 100MHz.
13
VDD2
PWR Power Supply Pin 2
14
VSS2
PWR Ground Pin 2
15
XOUT
AO
25MHz Crystal Connection Pin
OPEN when an External Clock Input is used
16
XIN
AI 25MHz Crystal Connection Pin or External Clock Input Pin
17
VSS1
PWR Ground Pin 1
18
VDD1
PWR Power Supply Pin 1
19
REFOUT
DO 25MHz Output Pin
25MHz Output Control Pin
20 REFOUT_OE
DI
This pin must be connected to “H” or “L”. (1)
REFOUT_OE = “L” : REFOUT outputs “L”.
REFOUT_OE = “H” : REFOUT outputs 25MHz.
Exposed Pad
--- Connecting exposed pad of package to board ground must be required.
Note:
(1) This pin is recommended to connect with more than 10[k] resistor as pull-up or pull-down.
If the device is mounted with wrong angle on the PCB, the resistor can prevent the device from
overcurrent.
(2) AI : Analog input pin
AO : Analog output pin
DI : Digital input pin
DO : Digital output pin
PWR : Power supply and Ground pin
014003471-E-00
-5-
2014/06