AK8131S Datasheet, PDF (5/8 Pages) Asahi Kasei Microsystems – Low Power Multiclock Generator with VCXO

The brand name
of AKEMD’s IC’s
AK8131S
Output clock frequency selection
The AK8131S generates a range of low-jitter and hi-accuracy clock frequencies with three built-in PLLs and
provides to up to four assigned outputs. A frequency selection at assigned output pin is configured by
pin-setting of S0 (Pin2), S1 (Pin3), and S2 (Pin14).
The selectable frequency is shown in Table 1..
Table 1: Clock output Frequency
Selection Pin
S0
(Pin 2)
L
L
L
L
H
H
H
H
S1
(Pin 3)
L
L
H
H
L
L
H
H
S2
(Pin 14)
L
H
L
H
L
H
L
H
CLK1
(Pin 7)
74.250
74.1758
OFF
OFF
61.875
55.000
68.333
OFF
Clock Output Frequency (MHz)
CLK2
(Pin 8)
OFF
OFF
66.000
82.000
74.250
66.000
82.000
74.250
CLK3
(Pin 10)
27.000
27.000
54.000
54.000
54.000
54.000
54.000
54.000
CLK4
(Pin 11)
27.000
27.000
OFF
OFF
OFF
OFF
OFF
OFF
Voltage Control Crystal Oscillator (VCXO)
The AK8131S has a voltage control crystal oscillator (VCXO), featuring fine frequency tuning for 27MHz of
primary clock frequency by external DC voltage control. This tuning enables output clock frequency to
synchronize the external clock system. VIN (Pin 4) accepts DC voltage control from a processor or a
system controller, and pulls the primary frequency of crystal to higher or lower. This pulling range is
determined by crystal characteristic, on-chip load capacitor, and stray capacitance of PCB. The AK8131S
is designed to range ±110ppm of primary frequency in AKEMD’s authorized condition, and the typical
pulling profile is shown in Figure 1. For details about the condition and other specific crystal application
case, refer the AK8130 Family application note.
27.0MHz VCXO Characteristics KDS SMD49 （CL=8.7pF）
(Cext1=15.0pF, Cext2=1.0pF)
200.0
150.0
100.0
50.0
0.0
0
0.5
1
1.5
2
2.5
3
3.5
-50.0
-100.0
-150.0
-200.0
VIN(V)
Figure 1: Typical VCXO Pulling Profile
MS0688-E-01
-5-
Feb-08