AK8122E Datasheet, PDF (4/9 Pages) Asahi Kasei Microsystems – Differential Zero Delay Clock Buffer

AK8122
The brand name
of AKEMD’s IC’s
DC Characteristics
All specifications at VDD: over 1.7 to 1.9V, Ta=Ta1(AK8122V) Ta=Ta2(AK8122E)
Parameter
Symbol
Conditions
Input Current
Differential Output
Reference Voltage
AC Differential Output Voltage ⁽¹⁾
High Level Output Voltage
Low Level Output Voltage
IL
VOREF
VOAC
VOH
VOL
Pin: CLKP, CLKN
Pin: OUTP, OUTN
Pin: OUTP, OUTN
Output Load: Fig.1
Pin: OUTP, OUTN
IOH=-1mA
Pin: OUTP, OUTN
IOL=+1mA
Input Load Capacitance
Pin: CLKP, CLKN
Input Load Capacitance error
Current Consumption ⁽¹⁾
Pin: CLKP, CLKN
IDD
(2)
(1) See Fig.8 for output load reference.
(2) Output impedance of 60-ohm. No load. VDD = 1.8V, Ta = 25.
MIN
-10
0.5VDD
-0.1
0.5
VDD
-0.1
TYP
2.1
0.1
50
MAX Unit
+10
μA
0.5VDD
V
+0.1
VDD-0.4 V
V
0.1
V
pF
pF
mA
AC Characteristics
All specifications at VDD: over 1.7 to 1.9V, Ta: -20 to +85℃, unless otherwise noted
Parameter
Symbol
Conditions
Output Frequency
Output Slew Rate ⁽⁵⁾
Input Clock Duty Cycle
Delay Time ⁽¹⁾
Jit 1
Jit 2
Output Clock Jitter
Jit 3
Jit 4
Start up Time ⁽⁶⁾
Jit 5
tlock
(1) See Fig.1.
(2) See Fig.2.
(3) See Fig.3.
(4) See Fig.4.
(5) See Fig.8.
(6) A provisional target value.
SFO + DFO + SKEW
250MHz-400MHz
Period, 1σ, 190–360MHz ⁽²⁾
Cycle-to-cycle, 1σ, 190–360MHz ⁽³⁾
Half Period, 1σ, 190–250MHz ⁽⁴⁾
Half Period, 1σ, 250–300MHz ⁽⁴⁾
Half Period, 1σ, 300–360MHz ⁽⁴⁾
MIN
160
1
40
-130
TYP
50
-30
MAX
400
3
60
+70
20
30
70
60
40
200
Unit
MHz
V/ns
%
ps
ps
ps
ps
ps
ps
us
Mar-09
MS0971-E-00
-4-