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AKD4425A-SA Datasheet, PDF (3/32 Pages) Asahi Kasei Microsystems – AK4425A Evaluation Board Rev.0 | |||
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[AKD4425A-SA]
 Setting of DIP switch
[S1]: AK4118 setting (ON = âHâ, OFF = âLâ)
No.
Pin
OFF
ON
1
DIF1
2
DIF0
3 OCKS1
4 OCKS0
AK4118âs Audio Data Format setting
Refer to Table 3
AK4118âs Master Clock setting
Refer to Table 4
Table 2. S1 setting
Default
L
L
H
L
Mode
4
5
DIF2
H
DIF1 DIF0
SDTO
L
L
24bit, Left justified
L
H
24bit, I2S
Table 3. Audio Data Format setting
Default
OCKS1
L
H
H
OCKS0
L
L
H
MCKO1
fs (max.)
256fs
96kHz
512fs
48kHz
128fs
192kHz
Table 4. MCLK clock setting
 Setting of SW1 and SW2 switch
Default
[SW1](SMUTE): Donât use. SW1 must be always âLâ.
[SW2](PDN): Reset of AK4118. Keep âHâ during normal operation.
<KM100600>
-3-
2009/09
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