AKD4425A-SA Datasheet, PDF (2/32 Pages) Asahi Kasei Microsystems – AK4425A Evaluation Board Rev.0

„ Operation sequence
1) Set up the power supply lines.
Each supply line should be distributed from the power supply unit.
[AKD4425A-SA]
Name
of jack
+15V
VDD
AVDD
Color
of jack
Red
Orange
Orange
Voltage
Range
+7∼+20V
+4.5∼+5.5V
Using
Regulator :
VDD and AVDD for AK4425A.
The power supply for AK4118, 74LVC541
and other logic circuit.
VDD of AK4425A
+4.5∼+5.5V AVDD of AK4425A
Default Setting
Should be connected.
Should be connected.
(Default, Note1)
Should be connected.
(Default, Note2)
Default
+15V
+5V
+5V
GND
Black
0V
Ground
Should be connected.
0V
Table 1. Set up of power supply lines
Note 1 ) VDD for AK4425A can supply to connect Regulator. In this case, should be to “short” of R58 and no
connected “VDD” of jack.
Note 2 ) AVDD for AK4425A can supply to connect Regulator. In this case, should be to “short” of R59 and no
connected “AVDD” of jack.
2) DIP Switch setting:
Refer to Table 2, Table 3 and Table 4.
3) Power Down:
The AK4118 should be reset once by bringing SW2 (AK4118 PDN) “L” upon power-up.
„ Evaluation mode
1. Using DIR (COAX) (Default)
The DIR generates MCLK, BICK, LRCK and SDATA from the received data through BNC connector (J3). It is
possible to evaluate the AK4425A by using CD disk. Should be no connected to PORT1 (DSP).
Setting: R41: short (0Ω) ; R42: open
＊ COAX is recommended for an evaluation of the Sound quality.
2. Using DIR (Optical Link)
The DIR generates MCLK, BICK, LRCK and SDATA from the received data through optical connector (PORT2:
TORX141). It is possible to evaluate the AK4425A by using CD disk. Should be no connected to PORT1 (DSP).
Setting: R41: open ;
R42: short (0Ω)
3. Supply all interface signals that includ master clock via PORT1 from external equipments..
Setting: R43, R44, R45, R46: open
R47, R48, R49, R50: short (0Ω)
Note) The above work of removing (open) or shorting resistors need to modify the connection by soldering.
<KM100600>
-2-
2009/09