AKD4394_07 Datasheet, PDF (3/32 Pages) Asahi Kasei Microsystems – 192kHz sampling 24Bit ΔΣ DAC.

ASAHI KASEI


External Analog Circuit (Rev.C)
[AKD4394]
The differential output circuit and LPF is implemented on board. The differential outputs of AK4394 is buffered by non-inverted circuit
and output via Cannon connector(differential output). LPF adds differential outputs. NJM5534D is used for op-amp on this board that
has low noise and high voltage torelance characteristics. Analog signal is output via Cannon and BNC connectors on the board. The
output level is about 2.94Vrms(typ@VREF=5.0V) by Cannon and 2Vrms(typ@VREF=5.0V) by BNC.
47u
AOUTL- ⁺
300
10n
+ _10u
300 ₃ 7
0.1u
10n
2
+
-4
6
NJM5534D
10u
+
0.1u
220
47u
AOUTL+ ⁺
300
10n
+ _10u
300
10n
37
2
+
-
6
4
NJM5534D
0.1u
10u
+
0.1u
220
3
2
1
+15
-15
620
620
430
0.1u +^10u
4.7n
2 _- 4 ₆ ¹⁰⁰
3+7
Lch
4.7n NJM5534D
0.1u
+_10u
Fig.2 External Analog Filter
Operation sequence
1. Set up the jumpers for power supply.
[JP15(REG)] selects power supply for AVDD pin of AK4394.
short: 5V is supplied from regulator. (default)
Nothing should be connected to A5V jack.
open: 5V is supplied from A5V.
2. Set up the power supply lines.
+15V=15V, -15V=-15V: Power supply for op-amp. AVDD of AK4394 is supplied from “+15V” through regulator
(JP15: short).
A5V=5V:
This jack is used when AVDD of AK4394 is supplied from this. In this case, JP15 should be
open.
DVDD=5V:
Power supply for logic circuit on this board.
VP=3V∼5.25V:
Digital (set JP10 to VP),
AGND=DGND=0V .
Each supply line should be distributed from the power unit.
3. Set up the evaluation modes by jumper pins and DIP switches.(See next item.)
4. Power on.(The AK4394 should be reset once by bringing PD "L" upon power-up.)
*SW1 resets the AK4394 during operation.
The AK4394 is reset at SW1="L" and exits resetting at SW1="H".
<KM063002>
3
’07/01