AK8456 Datasheet, PDF (3/32 Pages) Asahi Kasei Microsystems – 3 channel input 16bit 30MSPS Video ADC with LED driver

4. Block diagram and Functions
[AK8456]
CISIN0
CISIN1
CISIN2
Reference Voltage
Clock Gen.
Analog
PGA
AFE ch0
6
DAC
Analog
PGA
AFE ch1
6
DAC
Analog
PGA
AFE ch2
6
DAC
LDO_A
POR
Serial I/F
LDO_D
CMOS Output
D0
D1
D2
16bit
16 _Digital 16
8
D3
30MSPS
PGA
Output
ADC
Control
D4
D5
D6
LED
driver
D7
LED
Cont.
LVDD
Fig.1 Block diagram
 Input Block
AK8456 is available for CIS whose polarity is positive. The voltage difference between CISIN0~2
input signal and sensor reference voltage VDC is sampled. VDC is input externally and also is able to
generate internally. There are three channel mode and one channel mode. In one channel mode, sensor
signal input pin is CISIN0.
 DAC 6bit DAC
Offset adjust is excused by adding DAC output voltage to input signal. DAC resolution is six bit and
output range is 369mV (typ.). 100mV (max.) out of 369mV is used to cancel LSI internal offset.
Therefore effective range for correcting signal offset is 269mV (typ.).
 Sample and Hold Block
S/H
The voltage difference between CISIN0~2 input signal and sensor reference voltage VDC is sampled
at sample and hold block. Gain at sample and hold block is selected from 0dB and 6dB.
 Multiplexor MUX
Due to process three channels in a time-division, MUX selects one channel out of three channels in
order.
014002433-E-00
-3-
2014/06