AK1599V Datasheet, PDF (29/41 Pages) Asahi Kasei Microsystems – RF Transmitter for Satellite Communication

[AK1599V]
■ Power up Sequence of VDD/IFSEL and PDN pin simultaneous launch (Internal 3.3V Regulator Mode)
PDN pin resets digital block except registers and powers down analog block. First of the sequence, be sure to power down analog block by setting
MODE[1:0] in Address0x04 = ”11”. LOP, LON and LD pins may output undesired signal before setting MODE[1:0] = ”11” because initial value of
registers is undefined. DATAO pin may output undesired signal for a period of 20CLK from CLK starts. RFOUT pin doesn’t output undesired signal by
setting TXON pin = “L”.
Fig.13 Power up Sequence of VDD/IFSEL and PDN pin simultaneous launch (Internal 3.3V Regulator Mode)
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