AK4184 Datasheet, PDF (28/36 Pages) Asahi Kasei Microsystems – TSC with Keypad Scanner and GPIO Expander

[AK4184]
■ LED contrast control
The AK4184 contains an oscillator and a PWM control circuit for controlling the brightness of an LED by modulating
the “on” time. The brightness is determined by the PWM basic frequency (f_pwm) and duty cycles. The PWM block
divides the internal oscillator frequency (fosc) and modulates this output. The range of PWM frequency (fpwm) is
80Hz minimum. The modulating range is provided by 32 duty cycle steps from the PWM logic controller. The output
control is determined by the PACT bit. The duty cycle width of the PWM frequency is controlled by the BRV and
DIV bits. The PWM signal stays constant on normal mode until duty cycle, PWM frequency changed.
The output type is possible to select either CMOS or Open Drain, set by the LPU bit. After reset, the PWM block is in
power-down state and the BRCONT pin outputs a “L” level.
Oscillator ^fosc Divider
2^(DIV[2:0]+7)
f_{pwm PWM Logic} f_brcont
Controller
BRCONT
Example BRV [4:0] =11H setting
Figure 15. PWM output block
Internal
PWM
Counter
0 12
3 8 9 10 11 12 13 14 15 16 17 18 8 24 25 26 27 28 29 30 31 0
PWM frequency(fpwm) = fosc / 2^(DIV[2:0]+7)
BRCONT
Duty Cycle BR[4:0] =11H
Figure 16. PWM output waveform
■ PWM Control Register (PAGE 1)
Addr Name
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
MSB
LSB
18H PWMCTRL LPU 0 0
BRV[4:0]
0 PACT 0 0 0
DIV[2:0]
Table 35. PWM Control Register Format
Bits
15
14:13
12:8
7
6
5:3
2:0
Name
LPU
BRV
PACT
DIV
Description
Output type Open drain / CMOS
0: CMOS type (default)
1: Open Drain type
Reserved
Bright Control Value
The period of “H” output level is (control value + 1) cycle in unit of (fpwm/32)
Reserved
Oscillator and PWM Logic Controller Power Up
0:Power Down State(default)
1:Normal mode(Oscillator power up and enable output)
Reserved
PWM clock divider index
fpwm(typ.)=fosc/2^{[DIV + 7]}
Table 36. PWM Control Register
MS0603-E-00
28
2007/04