AK4184 Datasheet, PDF (27/36 Pages) Asahi Kasei Microsystems – TSC with Keypad Scanner and GPIO Expander

[AK4184]
■ GPIO Pin Pull-up Register (PAGE 1 )
The GPPU register determines the output pin type - either CMOS or Open drain. This register is valid for pins
configured as outputs (IO bit = “1” in Table 28). Pull-up resistors on GP0 to GP7 pins should be connected to
(IOVDD+0.3) V or lower voltage when the PUx bit is set to “1”.
Addr
12H
Name D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
GPPU PU7 PU6 PU5 PU4 PU3 PU2 PU1 PU0 0 0 0 0 0 0 0 0
Table 29. GPIO Pin Pull-up Register Format
Bits Name
Description
15:8 PU GPIO Pullup register select
0 = GPIO CMOS outputs (default)
1 = GPIO Open drain outputs
7:0
Reserved
Table 30. GPIO Pull-up Register
■ GPIO Pin State Register (PAGE 1)
The GPSR register determines the state of pins which are either pull-down or Hi-Z. This register is valid for pins
configured as inputs (IO bit = “0”).
Addr
13H
Name
GPSR
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
PS7 PS6 PS5 PS4 PS3 PS2 PS1 PS0 0 0 0 0 0 0 0 0
Table 31. GPIO Pin State Register Format
Bits Name
Description
15:8
PS GPIO Pin state select
0 = GPIO Pull-down (Rgp=1MΩ typ.) state (default)
1 = GPIO pin Hi-Z state
7:0
Reserved
Table 32. GPIO Pin state Register
■ GPIO Pin Level Register (PAGE 0)
The state of each GPIO pin can be determined by reading this register (GPLR). Each bit corresponds to one pin. Use
the GPLR read-only registers to determine the current level of a certain pin irrespective of the programmed pin
direction. For the upper eight bits, the read returns zero.
Addr Name D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
10H GPLR 0 0 0 0 0 0 0 0 GPD7 GPD6 GPD5 GPD4 GPD3 GPD2 GPD1 GPD0
Table 33. GPIO Pin Level Register Format
Bits Name
Description
15:8
0
Reserved
7:0 GPD GPIO Pin Level bits for GPIO pins
0 = Pin state is low
1 = Pin state is high
Table 34. GPIO Pin Level Register
MS0603-E-00
27
2007/04