AK4205EN Datasheet, PDF (22/25 Pages) Asahi Kasei Microsystems – Ultra Low Noise and Distortion Headphone Amp with Analog Switch

11. Example of Layout
Figure 17 shows the recommended layout of the AK4205.
[AK4205]
Figure 17. Recommended Layout Example of AK4205
Note:
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Connect AVSSA, AVSSB, RVSS, SWVSS and Exposed PAD (TAB) on the reverse side of the
IC at the top layer and minimize the wiring impedance between each Pin as much as possible.
When connected with VIA, the characteristics such as THD may deteriorate due to parasitic
inductance.
Place the Bypass Capacitor between PVDDA, PVDDB, PVEEA, PVEEB and GND in the
immediate vicinity of the IC and minimize the wiring impedance as much as possible.
For circuit design considering the IEC 61000-4-2 standard, it is recommended to connect an
inductor (typ. 470 nF) between the SWOUTA/B terminal and the headphone output, and a
zener diode (V_RWM = 5 V) between the headphone output and the analog ground.
016012367-E-00
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2016/12