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AK2358F Datasheet, PDF (21/26 Pages) Asahi Kasei Microsystems – Base-band LSI for Europian Cordless Telephones(CTI, CTI+) | |||
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ASAHI KASEI
MSK Signal Reception
USK signal r e c e p t i o n
d=FSL set to âOâ.
[AK2358FI
: S e t s o t h a t a frase d e t e c t i o n s i g n a l ( F D ) i s p u t o u t fros
t h e RDF/FD p i n .
N
: Synchronization frame detection?
RXAFSW = â1â
I
7 FSL set to â 1â
: Reception voice u ute
: S e t s o t h a t a n NSK s i g n a l r e c e p t i o n f l a g (RDF) i s p u t o u t
from t h e RDF/FD p i n .
N
: Reception of 8 bit of data?
Reception data read i ng
: R e a d i n g o f 8 b i t o f d a t a . c h a n g e t o RDF/FD = â H â
I
FCLN set to âOâ
I
I
I
A
: Waiting for the next synchronization frame
(1) If the internal register âFCLNâ is âOâ, the internal nodes RDATA, RCLK are fixed to
âlâ.
(2) After a synchronization frame is detected, FD goes to âLâ during the period âTâ, then
FCLN is set to âlâ.
(3) RDATA and RCLK put out the data following to the synchronized frame pattern, and these
are stored in the internal buffer.
(4) After 8 bit of reception data have been entered to the internal buffer, RDF goes âLâ.
(5) After the CPU detect that RDF is âLâ, it puts out 8 clock bits to SCLK, then read 8
bit of reception data from the SDATA pin.
(6) with input of 8 clock bits to SCLK, RDF goes âHâ.
(7) Afterwards, by repeating the steps (4) and (5) the necessary data bits are read.
(8) After the necessary data have been read, DIR goes âHâ, âFCLNâ is set to âOâ via the
serial interface, the internal nodes RDATA and RCLK are set to âlâ, then the system
waits for lhe next synchronization frame.
0152-E-00
-20â
1996/12
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