AKD5386-B-06 Datasheet, PDF (2/25 Pages) Asahi Kasei Microsystems – 24bit 192kHz A/D converter

ASAHI KASEI
[AKD5386-B]
Operation Manual
„ Operation sequence
1) Set up the power supply lines.
Name of
connecto
r
+15V
Color of
connector
Green
Voltage
+10~15V
Used for
NJM4580
Regulator T1
Regulator T2
-15V
VA
Blue
-10~-15V NJM4580
Red +4.5~+5.5V VA of AK5386
VD
AGND
DGND
Red
Black
Black
+2.7~+3.6V
0V
0V
VD of AK5386
AK4114
74HC14
Analog Ground
Digital Ground
Comment and attention
This connector should be connected.
And this connector is used when VA and VD of
AK5386 is supplied from regulator T1 and T2.
In this case, JP3 and JP4 should be REG side.
When this is REG side, VA and VD connector
should be open. (Default)
This connector should be connected.
This connector is used when VA of AK5386 is
supplied from VA connector without regulator
T1. In this case, JP3 should be VA side.
This connector is used when VD of AK5386 is
supplied from VD connector without regulator
T2. In this case, JP4 should be VD side.
This connector should be connected.
This connector is used when DGND is supplied
besides AGND. In this case, JP8 should be open.
Table 1. Power supply lines
(Note) Each supply line should be distributed from the power supply unit.
Default
Setting
+15V
-15V
Open
Open
0V
Open
2) Set up the evaluation mode, jumper pins and DIP switches. (See the followings.)
3) Power on.
The AK5386 and AK4114 should be reset once bringing SW2 = “L” upon power-up.
„ Evaluation mode
(1) Slave Mode
(1-1) A/D evaluation using DIT function of AK4114 <Default>
PORT2 (DIT) is used. DIT generates audio bi-phase signal from received data and which is output through
optical connector (TOTX141). It is possible to connect AKM’s D/A converter evaluation boards on the
digital-amplifier, which equips DIR input. Nothing should be connected to PORT1 (DSP).
JP5
MCLK
(1-2) All interface signals including master clock are fed externally.
PORT1 (DSP) is used. All interface signals (MCLK, SCLK, LRCK) are provided to the AK5386 through
PORT1. JP5 (MCLK) should be open. The DIF1 of SW1 (MODE) should be set to “H”.
JP5
MCLK
<KM082300>
-2-
2006/12